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88b68033b9
Fix docbook errors for x86 headers that were recently merged: docproc: arch/x86/include/asm/atomic_32.h: No such file or directory docproc: arch/x86/include/asm/io_32.h: No such file or directory Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Brian Gerst <brgerst@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
324 lines
11 KiB
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324 lines
11 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
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"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
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<book id="DoingIO">
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<bookinfo>
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<title>Bus-Independent Device Accesses</title>
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<authorgroup>
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<author>
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<firstname>Matthew</firstname>
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<surname>Wilcox</surname>
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<affiliation>
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<address>
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<email>matthew@wil.cx</email>
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</address>
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</affiliation>
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</author>
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</authorgroup>
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<authorgroup>
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<author>
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<firstname>Alan</firstname>
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<surname>Cox</surname>
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<affiliation>
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<address>
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<email>alan@lxorguk.ukuu.org.uk</email>
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</address>
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</affiliation>
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</author>
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</authorgroup>
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<copyright>
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<year>2001</year>
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<holder>Matthew Wilcox</holder>
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</copyright>
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<legalnotice>
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<para>
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This documentation is free software; you can redistribute
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it and/or modify it under the terms of the GNU General Public
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License as published by the Free Software Foundation; either
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version 2 of the License, or (at your option) any later
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version.
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</para>
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<para>
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This program is distributed in the hope that it will be
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useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details.
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</para>
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<para>
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You should have received a copy of the GNU General Public
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License along with this program; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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MA 02111-1307 USA
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</para>
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<para>
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For more details see the file COPYING in the source
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distribution of Linux.
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</para>
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</legalnotice>
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</bookinfo>
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<toc></toc>
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<chapter id="intro">
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<title>Introduction</title>
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<para>
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Linux provides an API which abstracts performing IO across all busses
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and devices, allowing device drivers to be written independently of
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bus type.
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</para>
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</chapter>
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<chapter id="bugs">
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<title>Known Bugs And Assumptions</title>
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<para>
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None.
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</para>
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</chapter>
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<chapter id="mmio">
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<title>Memory Mapped IO</title>
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<sect1 id="getting_access_to_the_device">
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<title>Getting Access to the Device</title>
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<para>
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The most widely supported form of IO is memory mapped IO.
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That is, a part of the CPU's address space is interpreted
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not as accesses to memory, but as accesses to a device. Some
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architectures define devices to be at a fixed address, but most
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have some method of discovering devices. The PCI bus walk is a
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good example of such a scheme. This document does not cover how
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to receive such an address, but assumes you are starting with one.
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Physical addresses are of type unsigned long.
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</para>
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<para>
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This address should not be used directly. Instead, to get an
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address suitable for passing to the accessor functions described
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below, you should call <function>ioremap</function>.
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An address suitable for accessing the device will be returned to you.
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</para>
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<para>
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After you've finished using the device (say, in your module's
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exit routine), call <function>iounmap</function> in order to return
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the address space to the kernel. Most architectures allocate new
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address space each time you call <function>ioremap</function>, and
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they can run out unless you call <function>iounmap</function>.
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</para>
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</sect1>
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<sect1 id="accessing_the_device">
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<title>Accessing the device</title>
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<para>
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The part of the interface most used by drivers is reading and
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writing memory-mapped registers on the device. Linux provides
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interfaces to read and write 8-bit, 16-bit, 32-bit and 64-bit
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quantities. Due to a historical accident, these are named byte,
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word, long and quad accesses. Both read and write accesses are
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supported; there is no prefetch support at this time.
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</para>
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<para>
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The functions are named <function>readb</function>,
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<function>readw</function>, <function>readl</function>,
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<function>readq</function>, <function>readb_relaxed</function>,
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<function>readw_relaxed</function>, <function>readl_relaxed</function>,
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<function>readq_relaxed</function>, <function>writeb</function>,
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<function>writew</function>, <function>writel</function> and
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<function>writeq</function>.
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</para>
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<para>
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Some devices (such as framebuffers) would like to use larger
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transfers than 8 bytes at a time. For these devices, the
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<function>memcpy_toio</function>, <function>memcpy_fromio</function>
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and <function>memset_io</function> functions are provided.
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Do not use memset or memcpy on IO addresses; they
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are not guaranteed to copy data in order.
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</para>
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<para>
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The read and write functions are defined to be ordered. That is the
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compiler is not permitted to reorder the I/O sequence. When the
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ordering can be compiler optimised, you can use <function>
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__readb</function> and friends to indicate the relaxed ordering. Use
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this with care.
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</para>
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<para>
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While the basic functions are defined to be synchronous with respect
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to each other and ordered with respect to each other the busses the
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devices sit on may themselves have asynchronicity. In particular many
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authors are burned by the fact that PCI bus writes are posted
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asynchronously. A driver author must issue a read from the same
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device to ensure that writes have occurred in the specific cases the
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author cares. This kind of property cannot be hidden from driver
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writers in the API. In some cases, the read used to flush the device
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may be expected to fail (if the card is resetting, for example). In
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that case, the read should be done from config space, which is
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guaranteed to soft-fail if the card doesn't respond.
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</para>
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<para>
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The following is an example of flushing a write to a device when
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the driver would like to ensure the write's effects are visible prior
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to continuing execution.
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</para>
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<programlisting>
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static inline void
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qla1280_disable_intrs(struct scsi_qla_host *ha)
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{
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struct device_reg *reg;
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reg = ha->iobase;
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/* disable risc and host interrupts */
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WRT_REG_WORD(&reg->ictrl, 0);
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/*
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* The following read will ensure that the above write
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* has been received by the device before we return from this
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* function.
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*/
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RD_REG_WORD(&reg->ictrl);
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ha->flags.ints_enabled = 0;
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}
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</programlisting>
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<para>
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In addition to write posting, on some large multiprocessing systems
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(e.g. SGI Challenge, Origin and Altix machines) posted writes won't
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be strongly ordered coming from different CPUs. Thus it's important
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to properly protect parts of your driver that do memory-mapped writes
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with locks and use the <function>mmiowb</function> to make sure they
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arrive in the order intended. Issuing a regular <function>readX
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</function> will also ensure write ordering, but should only be used
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when the driver has to be sure that the write has actually arrived
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at the device (not that it's simply ordered with respect to other
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writes), since a full <function>readX</function> is a relatively
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expensive operation.
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</para>
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<para>
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Generally, one should use <function>mmiowb</function> prior to
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releasing a spinlock that protects regions using <function>writeb
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</function> or similar functions that aren't surrounded by <function>
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readb</function> calls, which will ensure ordering and flushing. The
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following pseudocode illustrates what might occur if write ordering
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isn't guaranteed via <function>mmiowb</function> or one of the
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<function>readX</function> functions.
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</para>
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<programlisting>
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CPU A: spin_lock_irqsave(&dev_lock, flags)
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CPU A: ...
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CPU A: writel(newval, ring_ptr);
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CPU A: spin_unlock_irqrestore(&dev_lock, flags)
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...
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CPU B: spin_lock_irqsave(&dev_lock, flags)
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CPU B: writel(newval2, ring_ptr);
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CPU B: ...
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CPU B: spin_unlock_irqrestore(&dev_lock, flags)
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</programlisting>
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<para>
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In the case above, newval2 could be written to ring_ptr before
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newval. Fixing it is easy though:
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</para>
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<programlisting>
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CPU A: spin_lock_irqsave(&dev_lock, flags)
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CPU A: ...
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CPU A: writel(newval, ring_ptr);
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CPU A: mmiowb(); /* ensure no other writes beat us to the device */
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CPU A: spin_unlock_irqrestore(&dev_lock, flags)
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...
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CPU B: spin_lock_irqsave(&dev_lock, flags)
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CPU B: writel(newval2, ring_ptr);
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CPU B: ...
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CPU B: mmiowb();
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CPU B: spin_unlock_irqrestore(&dev_lock, flags)
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</programlisting>
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<para>
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See tg3.c for a real world example of how to use <function>mmiowb
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</function>
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</para>
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<para>
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PCI ordering rules also guarantee that PIO read responses arrive
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after any outstanding DMA writes from that bus, since for some devices
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the result of a <function>readb</function> call may signal to the
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driver that a DMA transaction is complete. In many cases, however,
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the driver may want to indicate that the next
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<function>readb</function> call has no relation to any previous DMA
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writes performed by the device. The driver can use
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<function>readb_relaxed</function> for these cases, although only
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some platforms will honor the relaxed semantics. Using the relaxed
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read functions will provide significant performance benefits on
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platforms that support it. The qla2xxx driver provides examples
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of how to use <function>readX_relaxed</function>. In many cases,
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a majority of the driver's <function>readX</function> calls can
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safely be converted to <function>readX_relaxed</function> calls, since
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only a few will indicate or depend on DMA completion.
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</para>
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</sect1>
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</chapter>
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<chapter id="port_space_accesses">
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<title>Port Space Accesses</title>
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<sect1 id="port_space_explained">
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<title>Port Space Explained</title>
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<para>
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Another form of IO commonly supported is Port Space. This is a
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range of addresses separate to the normal memory address space.
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Access to these addresses is generally not as fast as accesses
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to the memory mapped addresses, and it also has a potentially
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smaller address space.
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</para>
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<para>
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Unlike memory mapped IO, no preparation is required
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to access port space.
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</para>
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</sect1>
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<sect1 id="accessing_port_space">
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<title>Accessing Port Space</title>
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<para>
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Accesses to this space are provided through a set of functions
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which allow 8-bit, 16-bit and 32-bit accesses; also
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known as byte, word and long. These functions are
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<function>inb</function>, <function>inw</function>,
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<function>inl</function>, <function>outb</function>,
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<function>outw</function> and <function>outl</function>.
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</para>
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<para>
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Some variants are provided for these functions. Some devices
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require that accesses to their ports are slowed down. This
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functionality is provided by appending a <function>_p</function>
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to the end of the function. There are also equivalents to memcpy.
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The <function>ins</function> and <function>outs</function>
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functions copy bytes, words or longs to the given port.
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</para>
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</sect1>
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</chapter>
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<chapter id="pubfunctions">
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<title>Public Functions Provided</title>
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!Iarch/x86/include/asm/io.h
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!Elib/iomap.c
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</chapter>
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</book>
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