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167e782e30
Commit3800345f72(pciehp: fix slot name) introduces the pciehp_slot_with_bus module parameter, which was intended to help work around broken firmware that assigns the same name to multiple slots. Commit9e4f2e8d4d(pciehp: add message about pciehp_slot_with_bus option) tells the user to use the above parameter in the event of a name collision. This approach is sub-optimal because it requires too much work from the user. Instead, let's rename the slot on behalf of the user. If firmware assigns the name N to multiple slots, then: The first registered slot is assigned N The second registered slot is assigned N-1 The third registered slot is assigned N-2 The Mth registered slot becomes N-M In the event we overflow the slot->name parameter, we report an error to the user. This is a temporary fix until the entire PCI core can be reworked such that individual drivers no longer have to manage their own slot names. Tested-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
224 lines
7.3 KiB
C
224 lines
7.3 KiB
C
/*
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* PCI Express Hot Plug Controller Driver
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM Corp.
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* Copyright (C) 2003-2004 Intel Corporation
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
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*
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*/
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#ifndef _PCIEHP_H
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#define _PCIEHP_H
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/pci_hotplug.h>
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#include <linux/delay.h>
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#include <linux/sched.h> /* signal_pending() */
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#include <linux/pcieport_if.h>
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#include <linux/mutex.h>
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#define MY_NAME "pciehp"
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extern int pciehp_poll_mode;
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extern int pciehp_poll_time;
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extern int pciehp_debug;
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extern int pciehp_force;
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extern struct workqueue_struct *pciehp_wq;
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#define dbg(format, arg...) \
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do { \
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if (pciehp_debug) \
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printk("%s: " format, MY_NAME , ## arg); \
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} while (0)
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#define err(format, arg...) \
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printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
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#define info(format, arg...) \
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printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
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#define warn(format, arg...) \
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printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
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#define SLOT_NAME_SIZE 10
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struct slot {
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u8 bus;
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u8 device;
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u32 number;
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u8 state;
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struct timer_list task_event;
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u8 hp_slot;
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struct controller *ctrl;
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struct hpc_ops *hpc_ops;
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struct hotplug_slot *hotplug_slot;
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struct list_head slot_list;
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char name[SLOT_NAME_SIZE];
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unsigned long last_emi_toggle;
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struct delayed_work work; /* work for button event */
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struct mutex lock;
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};
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struct event_info {
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u32 event_type;
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struct slot *p_slot;
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struct work_struct work;
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};
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struct controller {
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struct mutex crit_sect; /* critical section mutex */
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struct mutex ctrl_lock; /* controller lock */
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int num_slots; /* Number of slots on ctlr */
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int slot_num_inc; /* 1 or -1 */
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struct pci_dev *pci_dev;
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struct list_head slot_list;
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struct hpc_ops *hpc_ops;
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wait_queue_head_t queue; /* sleep & wake process */
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u8 slot_device_offset;
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u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
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u8 slot_bus; /* Bus where the slots handled by this controller sit */
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u32 slot_cap;
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u8 cap_base;
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struct timer_list poll_timer;
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int cmd_busy;
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unsigned int no_cmd_complete:1;
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};
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#define INT_BUTTON_IGNORE 0
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#define INT_PRESENCE_ON 1
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#define INT_PRESENCE_OFF 2
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#define INT_SWITCH_CLOSE 3
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#define INT_SWITCH_OPEN 4
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#define INT_POWER_FAULT 5
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#define INT_POWER_FAULT_CLEAR 6
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#define INT_BUTTON_PRESS 7
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#define INT_BUTTON_RELEASE 8
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#define INT_BUTTON_CANCEL 9
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#define STATIC_STATE 0
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#define BLINKINGON_STATE 1
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#define BLINKINGOFF_STATE 2
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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/* Error messages */
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#define INTERLOCK_OPEN 0x00000002
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#define ADD_NOT_SUPPORTED 0x00000003
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#define CARD_FUNCTIONING 0x00000005
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#define ADAPTER_NOT_SAME 0x00000006
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#define NO_ADAPTER_PRESENT 0x00000009
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#define NOT_ENOUGH_RESOURCES 0x0000000B
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#define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
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#define WRONG_BUS_FREQUENCY 0x0000000D
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#define POWER_FAILURE 0x0000000E
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/* Field definitions in Slot Capabilities Register */
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#define ATTN_BUTTN_PRSN 0x00000001
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#define PWR_CTRL_PRSN 0x00000002
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#define MRL_SENS_PRSN 0x00000004
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#define ATTN_LED_PRSN 0x00000008
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#define PWR_LED_PRSN 0x00000010
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#define HP_SUPR_RM_SUP 0x00000020
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#define EMI_PRSN 0x00020000
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#define NO_CMD_CMPL_SUP 0x00040000
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#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN)
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#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN)
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#define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN)
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#define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
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#define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
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#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
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#define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
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#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
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extern int pciehp_sysfs_enable_slot(struct slot *slot);
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extern int pciehp_sysfs_disable_slot(struct slot *slot);
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extern u8 pciehp_handle_attention_button(struct slot *p_slot);
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extern u8 pciehp_handle_switch_change(struct slot *p_slot);
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extern u8 pciehp_handle_presence_change(struct slot *p_slot);
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extern u8 pciehp_handle_power_fault(struct slot *p_slot);
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extern int pciehp_configure_device(struct slot *p_slot);
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extern int pciehp_unconfigure_device(struct slot *p_slot);
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extern void pciehp_queue_pushbutton_work(struct work_struct *work);
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struct controller *pcie_init(struct pcie_device *dev);
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int pciehp_enable_slot(struct slot *p_slot);
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int pciehp_disable_slot(struct slot *p_slot);
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int pcie_enable_notification(struct controller *ctrl);
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static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
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{
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struct slot *slot;
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list_for_each_entry(slot, &ctrl->slot_list, slot_list) {
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if (slot->device == device)
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return slot;
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}
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err("%s: slot (device=0x%x) not found\n", __func__, device);
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return NULL;
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}
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struct hpc_ops {
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int (*power_on_slot)(struct slot *slot);
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int (*power_off_slot)(struct slot *slot);
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int (*get_power_status)(struct slot *slot, u8 *status);
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int (*get_attention_status)(struct slot *slot, u8 *status);
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int (*set_attention_status)(struct slot *slot, u8 status);
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int (*get_latch_status)(struct slot *slot, u8 *status);
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int (*get_adapter_status)(struct slot *slot, u8 *status);
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int (*get_emi_status)(struct slot *slot, u8 *status);
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int (*toggle_emi)(struct slot *slot);
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int (*get_max_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
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int (*get_cur_bus_speed)(struct slot *slot, enum pci_bus_speed *speed);
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int (*get_max_lnk_width)(struct slot *slot, enum pcie_link_width *val);
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int (*get_cur_lnk_width)(struct slot *slot, enum pcie_link_width *val);
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int (*query_power_fault)(struct slot *slot);
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void (*green_led_on)(struct slot *slot);
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void (*green_led_off)(struct slot *slot);
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void (*green_led_blink)(struct slot *slot);
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void (*release_ctlr)(struct controller *ctrl);
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int (*check_lnk_status)(struct controller *ctrl);
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};
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#ifdef CONFIG_ACPI
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#include <acpi/acpi.h>
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#include <acpi/acpi_bus.h>
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#include <acpi/actypes.h>
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#include <linux/pci-acpi.h>
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static inline int pciehp_get_hp_hw_control_from_firmware(struct pci_dev *dev)
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{
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u32 flags = (OSC_PCI_EXPRESS_NATIVE_HP_CONTROL |
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OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
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return acpi_get_hp_hw_control_from_firmware(dev, flags);
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}
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static inline int pciehp_get_hp_params_from_firmware(struct pci_dev *dev,
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struct hotplug_params *hpp)
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{
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if (ACPI_FAILURE(acpi_get_hp_params_from_firmware(dev->bus, hpp)))
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return -ENODEV;
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return 0;
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}
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#else
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#define pciehp_get_hp_hw_control_from_firmware(dev) 0
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#define pciehp_get_hp_params_from_firmware(dev, hpp) (-ENODEV)
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#endif /* CONFIG_ACPI */
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#endif /* _PCIEHP_H */
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