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c6ff132d42
A lot of header files are only used internally now, so they can be moved to mach-s3c, out of the visibility of drivers. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20200806182059.2431-40-krzk@kernel.org [krzk: Rebase and fixup leds-s3c24xx driver] Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
174 lines
3.9 KiB
C
174 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2008 Simtec Electronics
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// Ben Dooks <ben@simtec.co.uk>
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// http://armlinux.simtec.co.uk/
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//
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// S3C series CPU initialisation
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/*
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* NOTE: Code in this file is not used on S3C64xx when booting with
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* Device Tree support.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/serial_core.h>
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#include <linux/serial_s3c.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "cpu.h"
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#include "devs.h"
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static struct cpu_table *cpu;
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static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode,
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struct cpu_table *tab,
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unsigned int count)
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{
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for (; count != 0; count--, tab++) {
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if ((idcode & tab->idmask) == (tab->idcode & tab->idmask))
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return tab;
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}
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return NULL;
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}
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void __init s3c_init_cpu(unsigned long idcode,
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struct cpu_table *cputab, unsigned int cputab_size)
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{
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cpu = s3c_lookup_cpu(idcode, cputab, cputab_size);
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if (cpu == NULL) {
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printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode);
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panic("Unknown S3C24XX CPU");
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}
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printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode);
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if (cpu->init == NULL) {
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printk(KERN_ERR "CPU %s support not enabled\n", cpu->name);
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panic("Unsupported Samsung CPU");
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}
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if (cpu->map_io)
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cpu->map_io();
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}
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/* s3c24xx_init_clocks
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*
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* Initialise the clock subsystem and associated information from the
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* given master crystal value.
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*
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* xtal = 0 -> use default PLL crystal value (normally 12MHz)
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* != 0 -> PLL crystal value in Hz
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*/
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void __init s3c24xx_init_clocks(int xtal)
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{
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if (xtal == 0)
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xtal = 12*1000*1000;
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if (cpu == NULL)
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panic("s3c24xx_init_clocks: no cpu setup?\n");
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if (cpu->init_clocks == NULL)
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panic("s3c24xx_init_clocks: cpu has no clock init\n");
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else
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(cpu->init_clocks)(xtal);
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}
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/* uart management */
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#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
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static int nr_uarts __initdata = 0;
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#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
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static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS];
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#endif
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/* s3c24xx_init_uartdevs
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*
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* copy the specified platform data and configuration into our central
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* set of devices, before the data is thrown away after the init process.
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*
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* This also fills in the array passed to the serial driver for the
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* early initialisation of the console.
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*/
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void __init s3c24xx_init_uartdevs(char *name,
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struct s3c24xx_uart_resources *res,
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struct s3c2410_uartcfg *cfg, int no)
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{
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#ifdef CONFIG_SERIAL_SAMSUNG_UARTS
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struct platform_device *platdev;
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struct s3c2410_uartcfg *cfgptr = uart_cfgs;
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struct s3c24xx_uart_resources *resp;
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int uart;
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memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no);
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for (uart = 0; uart < no; uart++, cfg++, cfgptr++) {
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platdev = s3c24xx_uart_src[cfgptr->hwport];
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resp = res + cfgptr->hwport;
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s3c24xx_uart_devs[uart] = platdev;
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platdev->name = name;
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platdev->resource = resp->resources;
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platdev->num_resources = resp->nr_resources;
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platdev->dev.platform_data = cfgptr;
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}
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nr_uarts = no;
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#endif
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}
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void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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if (cpu == NULL)
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return;
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if (cpu->init_uarts == NULL && IS_ENABLED(CONFIG_SAMSUNG_ATAGS)) {
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printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n");
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} else
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(cpu->init_uarts)(cfg, no);
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}
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#endif
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static int __init s3c_arch_init(void)
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{
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int ret;
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/* init is only needed for ATAGS based platforms */
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if (!IS_ENABLED(CONFIG_ATAGS) ||
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(!soc_is_s3c24xx() && !soc_is_s3c64xx()))
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return 0;
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// do the correct init for cpu
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if (cpu == NULL) {
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/* Not needed when booting with device tree. */
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if (of_have_populated_dt())
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return 0;
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panic("s3c_arch_init: NULL cpu\n");
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}
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ret = (cpu->init)();
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if (ret != 0)
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return ret;
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#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS)
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ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts);
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#endif
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return ret;
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}
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arch_initcall(s3c_arch_init);
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