Linus Walleij 1f12d3c11f PCI: Add DT bindings for Faraday Technology PCI Host Bridge ... Add device tree bindings for the Faraday technology PCI Host Bridge. This IP is found in the Storlink/Storm/Cortina Gemini SoC platform. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rob Herring <robh@kernel.org> CC: Janos Laube <janos.dev@gmail.com> CC: Paulius Zaleckas <paulius.zaleckas@gmail.com> CC: Hans Ulli Kroll <ulli.kroll@googlemail.com> CC: Florian Fainelli <f.fainelli@gmail.com> CC: devicetree@vger.kernel.org CC: Feng-Hsin Chiang <john453@faraday-tech.com> CC: Greentime Hu <green.hu@gmail.com>		2017-03-24 10:30:29 -05:00
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bindings	PCI: Add DT bindings for Faraday Technology PCI Host Bridge	2017-03-24 10:30:29 -05:00
00-INDEX
booting-without-of.txt	dt: add documentation of "hotpluggable" memory property	2016-12-12 18:55:07 -08:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
todo.txt
usage-model.txt