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658c9d2b9f
This patch fixes a crash that happens when testing rfc4543(gcm(aes))
Unable to handle kernel paging request for data at address 0xf59b3420
Faulting instruction address: 0xc0012994
Oops: Kernel access of bad area, sig: 11 [#1]
BE PowerPC 44x Platform
Modules linked in: tcrypt(+) crypto4xx [...]
CPU: 0 PID: 0 Comm: swapper Tainted: G O 4.17.0-rc1+ #23
NIP: c0012994 LR: d3077934 CTR: 06026d49
REGS: cfff7e30 TRAP: 0300 Tainted: G O (4.17.0-rc1+)
MSR: 00029000 <CE,EE,ME> CR: 44744822 XER: 00000000
DEAR: f59b3420 ESR: 00000000
NIP [c0012994] __dma_sync+0x58/0x10c
LR [d3077934] crypto4xx_bh_tasklet_cb+0x188/0x3c8 [crypto4xx]
__dma_sync was fed the temporary _dst that crypto4xx_build_pd()
had in it's function stack. This clearly never worked.
This patch therefore overhauls the code from the original driver
and puts the temporary dst sg list into aead's request context.
Fixes: a0aae821ba ("crypto: crypto4xx - prepare for AEAD support")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
249 lines
7.4 KiB
C
249 lines
7.4 KiB
C
/**
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* AMCC SoC PPC4xx Crypto Driver
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*
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* Copyright (c) 2008 Applied Micro Circuits Corporation.
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* All rights reserved. James Hsiao <jhsiao@amcc.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* This is the header file for AMCC Crypto offload Linux device driver for
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* use with Linux CryptoAPI.
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*/
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#ifndef __CRYPTO4XX_CORE_H__
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#define __CRYPTO4XX_CORE_H__
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#include <linux/ratelimit.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/aead.h>
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#include <crypto/internal/skcipher.h>
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#include "crypto4xx_reg_def.h"
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#include "crypto4xx_sa.h"
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#define PPC460SX_SDR0_SRST 0x201
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#define PPC405EX_SDR0_SRST 0x200
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#define PPC460EX_SDR0_SRST 0x201
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#define PPC460EX_CE_RESET 0x08000000
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#define PPC460SX_CE_RESET 0x20000000
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#define PPC405EX_CE_RESET 0x00000008
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#define CRYPTO4XX_CRYPTO_PRIORITY 300
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#define PPC4XX_NUM_PD 256
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#define PPC4XX_LAST_PD (PPC4XX_NUM_PD - 1)
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#define PPC4XX_NUM_GD 1024
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#define PPC4XX_LAST_GD (PPC4XX_NUM_GD - 1)
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#define PPC4XX_NUM_SD 256
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#define PPC4XX_LAST_SD (PPC4XX_NUM_SD - 1)
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#define PPC4XX_SD_BUFFER_SIZE 2048
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#define PD_ENTRY_BUSY BIT(1)
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#define PD_ENTRY_INUSE BIT(0)
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#define PD_ENTRY_FREE 0
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#define ERING_WAS_FULL 0xffffffff
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struct crypto4xx_device;
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union shadow_sa_buf {
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struct dynamic_sa_ctl sa;
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/* alloc 256 bytes which is enough for any kind of dynamic sa */
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u8 buf[256];
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} __packed;
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struct pd_uinfo {
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struct crypto4xx_device *dev;
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u32 state;
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u32 using_sd;
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u32 first_gd; /* first gather discriptor
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used by this packet */
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u32 num_gd; /* number of gather discriptor
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used by this packet */
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u32 first_sd; /* first scatter discriptor
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used by this packet */
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u32 num_sd; /* number of scatter discriptors
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used by this packet */
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struct dynamic_sa_ctl *sa_va; /* shadow sa */
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struct sa_state_record *sr_va; /* state record for shadow sa */
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u32 sr_pa;
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struct scatterlist *dest_va;
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struct crypto_async_request *async_req; /* base crypto request
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for this packet */
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};
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struct crypto4xx_device {
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struct crypto4xx_core_device *core_dev;
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void __iomem *ce_base;
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void __iomem *trng_base;
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struct ce_pd *pdr; /* base address of packet descriptor ring */
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dma_addr_t pdr_pa; /* physical address of pdr_base_register */
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struct ce_gd *gdr; /* gather descriptor ring */
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dma_addr_t gdr_pa; /* physical address of gdr_base_register */
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struct ce_sd *sdr; /* scatter descriptor ring */
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dma_addr_t sdr_pa; /* physical address of sdr_base_register */
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void *scatter_buffer_va;
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dma_addr_t scatter_buffer_pa;
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union shadow_sa_buf *shadow_sa_pool;
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dma_addr_t shadow_sa_pool_pa;
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struct sa_state_record *shadow_sr_pool;
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dma_addr_t shadow_sr_pool_pa;
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u32 pdr_tail;
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u32 pdr_head;
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u32 gdr_tail;
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u32 gdr_head;
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u32 sdr_tail;
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u32 sdr_head;
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struct pd_uinfo *pdr_uinfo;
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struct list_head alg_list; /* List of algorithm supported
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by this device */
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struct ratelimit_state aead_ratelimit;
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bool is_revb;
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};
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struct crypto4xx_core_device {
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struct device *device;
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struct platform_device *ofdev;
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struct crypto4xx_device *dev;
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struct hwrng *trng;
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u32 int_status;
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u32 irq;
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struct tasklet_struct tasklet;
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spinlock_t lock;
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};
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struct crypto4xx_ctx {
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struct crypto4xx_device *dev;
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struct dynamic_sa_ctl *sa_in;
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struct dynamic_sa_ctl *sa_out;
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__le32 iv_nonce;
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u32 sa_len;
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union {
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struct crypto_skcipher *cipher;
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struct crypto_aead *aead;
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} sw_cipher;
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};
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struct crypto4xx_aead_reqctx {
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struct scatterlist dst[2];
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};
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struct crypto4xx_alg_common {
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u32 type;
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union {
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struct skcipher_alg cipher;
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struct ahash_alg hash;
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struct aead_alg aead;
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} u;
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};
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struct crypto4xx_alg {
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struct list_head entry;
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struct crypto4xx_alg_common alg;
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struct crypto4xx_device *dev;
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};
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int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
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void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
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void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
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int crypto4xx_build_pd(struct crypto_async_request *req,
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struct crypto4xx_ctx *ctx,
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struct scatterlist *src,
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struct scatterlist *dst,
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const unsigned int datalen,
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const __le32 *iv, const u32 iv_len,
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const struct dynamic_sa_ctl *sa,
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const unsigned int sa_len,
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const unsigned int assoclen,
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struct scatterlist *dst_tmp);
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int crypto4xx_setkey_aes_cbc(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_cfb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_ctr(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_ecb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_aes_ofb(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_setkey_rfc3686(struct crypto_skcipher *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_encrypt_ctr(struct skcipher_request *req);
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int crypto4xx_decrypt_ctr(struct skcipher_request *req);
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int crypto4xx_encrypt_iv(struct skcipher_request *req);
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int crypto4xx_decrypt_iv(struct skcipher_request *req);
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int crypto4xx_encrypt_noiv(struct skcipher_request *req);
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int crypto4xx_decrypt_noiv(struct skcipher_request *req);
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int crypto4xx_rfc3686_encrypt(struct skcipher_request *req);
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int crypto4xx_rfc3686_decrypt(struct skcipher_request *req);
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int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
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int crypto4xx_hash_digest(struct ahash_request *req);
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int crypto4xx_hash_final(struct ahash_request *req);
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int crypto4xx_hash_update(struct ahash_request *req);
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int crypto4xx_hash_init(struct ahash_request *req);
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/**
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* Note: Only use this function to copy items that is word aligned.
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*/
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static inline void crypto4xx_memcpy_swab32(u32 *dst, const void *buf,
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size_t len)
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{
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for (; len >= 4; buf += 4, len -= 4)
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*dst++ = __swab32p((u32 *) buf);
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if (len) {
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const u8 *tmp = (u8 *)buf;
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switch (len) {
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case 3:
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*dst = (tmp[2] << 16) |
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(tmp[1] << 8) |
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tmp[0];
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break;
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case 2:
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*dst = (tmp[1] << 8) |
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tmp[0];
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break;
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case 1:
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*dst = tmp[0];
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break;
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default:
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break;
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}
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}
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}
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static inline void crypto4xx_memcpy_from_le32(u32 *dst, const void *buf,
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size_t len)
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{
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crypto4xx_memcpy_swab32(dst, buf, len);
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}
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static inline void crypto4xx_memcpy_to_le32(__le32 *dst, const void *buf,
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size_t len)
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{
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crypto4xx_memcpy_swab32((u32 *)dst, buf, len);
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}
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int crypto4xx_setauthsize_aead(struct crypto_aead *ciper,
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unsigned int authsize);
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int crypto4xx_setkey_aes_ccm(struct crypto_aead *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_encrypt_aes_ccm(struct aead_request *req);
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int crypto4xx_decrypt_aes_ccm(struct aead_request *req);
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int crypto4xx_setkey_aes_gcm(struct crypto_aead *cipher,
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const u8 *key, unsigned int keylen);
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int crypto4xx_encrypt_aes_gcm(struct aead_request *req);
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int crypto4xx_decrypt_aes_gcm(struct aead_request *req);
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#endif
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