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Currently, code of Loongson-2/3 is under loongson directory and code of Loongson-1 is under loongson1 directory. Besides, there are Kconfig options such as MACH_LOONGSON and MACH_LOONGSON1. This naming style is very ugly and confusing. Since Loongson-2/3 are both 64-bit general- purpose CPU while Loongson-1 is 32-bit SoC, we rename both file names and Kconfig symbols from loongson/loongson1 to loongson64/loongson32. [ralf@linux-mips.org: Resolve a number of simple conflicts.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
223 lines
5.5 KiB
C
223 lines
5.5 KiB
C
/*
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* CPU Frequency Scaling for Loongson 1 SoC
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*
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* Copyright (C) 2014 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/cpu.h>
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <cpufreq.h>
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#include <loongson1.h>
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static struct {
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struct device *dev;
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struct clk *clk; /* CPU clk */
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struct clk *mux_clk; /* MUX of CPU clk */
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struct clk *pll_clk; /* PLL clk */
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struct clk *osc_clk; /* OSC clk */
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unsigned int max_freq;
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unsigned int min_freq;
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} ls1x_cpufreq;
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static int ls1x_cpufreq_notifier(struct notifier_block *nb,
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unsigned long val, void *data)
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{
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if (val == CPUFREQ_POSTCHANGE)
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current_cpu_data.udelay_val = loops_per_jiffy;
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return NOTIFY_OK;
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}
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static struct notifier_block ls1x_cpufreq_notifier_block = {
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.notifier_call = ls1x_cpufreq_notifier
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};
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static int ls1x_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int index)
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{
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unsigned int old_freq, new_freq;
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old_freq = policy->cur;
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new_freq = policy->freq_table[index].frequency;
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/*
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* The procedure of reconfiguring CPU clk is as below.
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*
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* - Reparent CPU clk to OSC clk
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* - Reset CPU clock (very important)
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* - Reconfigure CPU DIV
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* - Reparent CPU clk back to CPU DIV clk
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*/
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dev_dbg(ls1x_cpufreq.dev, "%u KHz --> %u KHz\n", old_freq, new_freq);
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clk_set_parent(policy->clk, ls1x_cpufreq.osc_clk);
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__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU,
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LS1X_CLK_PLL_DIV);
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__raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU),
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LS1X_CLK_PLL_DIV);
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clk_set_rate(ls1x_cpufreq.mux_clk, new_freq * 1000);
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clk_set_parent(policy->clk, ls1x_cpufreq.mux_clk);
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return 0;
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}
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static int ls1x_cpufreq_init(struct cpufreq_policy *policy)
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{
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struct cpufreq_frequency_table *freq_tbl;
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unsigned int pll_freq, freq;
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int steps, i, ret;
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pll_freq = clk_get_rate(ls1x_cpufreq.pll_clk) / 1000;
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steps = 1 << DIV_CPU_WIDTH;
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freq_tbl = kzalloc(sizeof(*freq_tbl) * steps, GFP_KERNEL);
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if (!freq_tbl) {
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dev_err(ls1x_cpufreq.dev,
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"failed to alloc cpufreq_frequency_table\n");
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ret = -ENOMEM;
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goto out;
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}
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for (i = 0; i < (steps - 1); i++) {
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freq = pll_freq / (i + 1);
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if ((freq < ls1x_cpufreq.min_freq) ||
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(freq > ls1x_cpufreq.max_freq))
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freq_tbl[i].frequency = CPUFREQ_ENTRY_INVALID;
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else
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freq_tbl[i].frequency = freq;
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dev_dbg(ls1x_cpufreq.dev,
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"cpufreq table: index %d: frequency %d\n", i,
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freq_tbl[i].frequency);
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}
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freq_tbl[i].frequency = CPUFREQ_TABLE_END;
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policy->clk = ls1x_cpufreq.clk;
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ret = cpufreq_generic_init(policy, freq_tbl, 0);
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if (ret)
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kfree(freq_tbl);
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out:
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return ret;
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}
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static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
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{
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kfree(policy->freq_table);
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return 0;
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}
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static struct cpufreq_driver ls1x_cpufreq_driver = {
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.name = "cpufreq-ls1x",
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = ls1x_cpufreq_target,
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.get = cpufreq_generic_get,
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.init = ls1x_cpufreq_init,
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.exit = ls1x_cpufreq_exit,
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.attr = cpufreq_generic_attr,
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};
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static int ls1x_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_unregister_notifier(&ls1x_cpufreq_notifier_block,
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CPUFREQ_TRANSITION_NOTIFIER);
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cpufreq_unregister_driver(&ls1x_cpufreq_driver);
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return 0;
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}
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static int ls1x_cpufreq_probe(struct platform_device *pdev)
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{
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struct plat_ls1x_cpufreq *pdata = pdev->dev.platform_data;
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struct clk *clk;
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int ret;
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if (!pdata || !pdata->clk_name || !pdata->osc_clk_name)
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return -EINVAL;
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ls1x_cpufreq.dev = &pdev->dev;
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clk = devm_clk_get(&pdev->dev, pdata->clk_name);
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if (IS_ERR(clk)) {
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dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
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pdata->clk_name);
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ret = PTR_ERR(clk);
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goto out;
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}
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ls1x_cpufreq.clk = clk;
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clk = clk_get_parent(clk);
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if (IS_ERR(clk)) {
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dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
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__clk_get_name(ls1x_cpufreq.clk));
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ret = PTR_ERR(clk);
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goto out;
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}
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ls1x_cpufreq.mux_clk = clk;
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clk = clk_get_parent(clk);
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if (IS_ERR(clk)) {
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dev_err(ls1x_cpufreq.dev, "unable to get parent of %s clock\n",
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__clk_get_name(ls1x_cpufreq.mux_clk));
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ret = PTR_ERR(clk);
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goto out;
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}
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ls1x_cpufreq.pll_clk = clk;
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clk = devm_clk_get(&pdev->dev, pdata->osc_clk_name);
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if (IS_ERR(clk)) {
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dev_err(ls1x_cpufreq.dev, "unable to get %s clock\n",
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pdata->osc_clk_name);
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ret = PTR_ERR(clk);
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goto out;
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}
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ls1x_cpufreq.osc_clk = clk;
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ls1x_cpufreq.max_freq = pdata->max_freq;
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ls1x_cpufreq.min_freq = pdata->min_freq;
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ret = cpufreq_register_driver(&ls1x_cpufreq_driver);
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if (ret) {
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dev_err(ls1x_cpufreq.dev,
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"failed to register cpufreq driver: %d\n", ret);
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goto out;
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}
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ret = cpufreq_register_notifier(&ls1x_cpufreq_notifier_block,
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CPUFREQ_TRANSITION_NOTIFIER);
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if (!ret)
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goto out;
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dev_err(ls1x_cpufreq.dev, "failed to register cpufreq notifier: %d\n",
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ret);
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cpufreq_unregister_driver(&ls1x_cpufreq_driver);
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out:
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return ret;
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}
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static struct platform_driver ls1x_cpufreq_platdrv = {
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.driver = {
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.name = "ls1x-cpufreq",
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},
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.probe = ls1x_cpufreq_probe,
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.remove = ls1x_cpufreq_remove,
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};
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module_platform_driver(ls1x_cpufreq_platdrv);
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MODULE_AUTHOR("Kelvin Cheung <keguang.zhang@gmail.com>");
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MODULE_DESCRIPTION("Loongson 1 CPUFreq driver");
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MODULE_LICENSE("GPL");
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