Alex Bennée e3feebf817 kvm: arm64: handle single-step of hyp emulated mmio instructions ... There is a fast-path of MMIO emulation inside hyp mode. The handling of single-step is broadly the same as kvm_arm_handle_step_debug() except we just setup ESR/HSR so handle_exit() does the correct thing as we exit. For the case of an emulated illegal access causing an SError we will exit via the ARM_EXCEPTION_EL1_SERROR path in handle_exit(). We behave as we would during a real SError and clear the DBG_SPSR_SS bit for the emulated instruction. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>		2017-11-29 18:17:47 +01:00
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debug-sr.c	arm64: sysreg: Move SPE registers and PSB into common header files	2017-10-18 12:53:32 +01:00
entry.S	arm64: KVM: Handle async aborts delivered while at EL2	2016-09-08 12:53:00 +02:00
fpsimd.S	arm64: KVM: Implement fpsimd save/restore	2015-12-14 11:30:41 +00:00
hyp-entry.S	arm64: KVM: Convert __cpu_reset_hyp_mode to using __hyp_reset_vectors	2017-04-09 07:49:22 -07:00
Makefile	Fixes for interrupt controller emulation in ARM/ARM64 and x86, plus a one-liner	2017-11-04 11:44:55 -07:00
s2-setup.c	arm64: Remove the !CONFIG_ARM64_HW_AFDBM alternative code paths	2017-08-21 11:13:11 +01:00
switch.c	kvm: arm64: handle single-step of hyp emulated mmio instructions	2017-11-29 18:17:47 +01:00
sysreg-sr.c	arm64: KVM: VHE: Context switch MDSCR_EL1	2016-07-23 18:07:12 +02:00
tlb.c	arm64: KVM: Add support for VPIPT I-caches	2017-03-20 16:25:45 +00:00