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3c17fe4b8f
This patch enables the sending of AVI infoframes in drivers/gpu/drm/i915/intel_hdmi.c. My receiver currently loses sync when the HDMI output on my computer (DG45FC motherboard) is switched from 800x600 (the BIOS resolution) to 1920x1080 as part of the boot. Fixable by switching inputs on the receiver a couple of times. With this patch, my receiver has not lost sync yet (> 40 tries). Fourth version, now based on drm-intel-next from: git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel.git Two questions still remain: I'm assuming that the sdvo hardware also stores a header ECC byte in the MSB of the first dword - is this correct? Does the SDVOB and SDVOC handling in intel_hdmi_set_avi_infoframe() look correct? Signed-off-by: David Härdeman <david@hardeman.nu> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
416 lines
12 KiB
C
416 lines
12 KiB
C
/*
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* Copyright 2006 Dave Airlie <airlied@linux.ie>
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* Copyright © 2006-2009 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Jesse Barnes <jesse.barnes@intel.com>
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*/
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "drm_edid.h"
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#include "intel_drv.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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struct intel_hdmi {
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struct intel_encoder base;
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u32 sdvox_reg;
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int ddc_bus;
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bool has_hdmi_sink;
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bool has_audio;
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int force_audio;
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struct drm_property *force_audio_property;
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};
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static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder)
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{
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return container_of(encoder, struct intel_hdmi, base.base);
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}
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static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector)
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{
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return container_of(intel_attached_encoder(connector),
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struct intel_hdmi, base);
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}
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void intel_dip_infoframe_csum(struct dip_infoframe *avi_if)
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{
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uint8_t *data = (uint8_t *)avi_if;
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uint8_t sum = 0;
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unsigned i;
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avi_if->checksum = 0;
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avi_if->ecc = 0;
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for (i = 0; i < sizeof(*avi_if); i++)
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sum += data[i];
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avi_if->checksum = 0x100 - sum;
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}
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static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
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{
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struct dip_infoframe avi_if = {
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.type = DIP_TYPE_AVI,
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.ver = DIP_VERSION_AVI,
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.len = DIP_LEN_AVI,
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};
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uint32_t *data = (uint32_t *)&avi_if;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
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u32 port;
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unsigned i;
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if (!intel_hdmi->has_hdmi_sink)
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return;
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/* XXX first guess at handling video port, is this corrent? */
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if (intel_hdmi->sdvox_reg == SDVOB)
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port = VIDEO_DIP_PORT_B;
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else if (intel_hdmi->sdvox_reg == SDVOC)
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port = VIDEO_DIP_PORT_C;
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else
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return;
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I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
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VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC);
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intel_dip_infoframe_csum(&avi_if);
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for (i = 0; i < sizeof(avi_if); i += 4) {
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I915_WRITE(VIDEO_DIP_DATA, *data);
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data++;
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}
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I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | port |
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VIDEO_DIP_SELECT_AVI | VIDEO_DIP_FREQ_VSYNC |
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VIDEO_DIP_ENABLE_AVI);
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}
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static void intel_hdmi_mode_set(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_crtc *crtc = encoder->crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
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u32 sdvox;
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sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
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/* Required on CPT */
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if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev))
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sdvox |= HDMI_MODE_SELECT;
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if (intel_hdmi->has_audio) {
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sdvox |= SDVO_AUDIO_ENABLE;
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sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC;
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}
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if (intel_crtc->pipe == 1) {
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if (HAS_PCH_CPT(dev))
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sdvox |= PORT_TRANS_B_SEL_CPT;
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else
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sdvox |= SDVO_PIPE_B_SELECT;
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}
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I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
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POSTING_READ(intel_hdmi->sdvox_reg);
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intel_hdmi_set_avi_infoframe(encoder);
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}
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static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
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u32 temp;
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temp = I915_READ(intel_hdmi->sdvox_reg);
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/* HW workaround, need to toggle enable bit off and on for 12bpc, but
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* we do this anyway which shows more stable in testing.
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*/
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if (HAS_PCH_SPLIT(dev)) {
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I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE);
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POSTING_READ(intel_hdmi->sdvox_reg);
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}
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if (mode != DRM_MODE_DPMS_ON) {
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temp &= ~SDVO_ENABLE;
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} else {
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temp |= SDVO_ENABLE;
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}
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I915_WRITE(intel_hdmi->sdvox_reg, temp);
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POSTING_READ(intel_hdmi->sdvox_reg);
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/* HW workaround, need to write this twice for issue that may result
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* in first write getting masked.
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*/
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if (HAS_PCH_SPLIT(dev)) {
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I915_WRITE(intel_hdmi->sdvox_reg, temp);
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POSTING_READ(intel_hdmi->sdvox_reg);
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}
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}
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static int intel_hdmi_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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if (mode->clock > 165000)
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return MODE_CLOCK_HIGH;
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if (mode->clock < 20000)
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return MODE_CLOCK_HIGH;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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return MODE_OK;
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}
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static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
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struct drm_display_mode *mode,
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struct drm_display_mode *adjusted_mode)
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{
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return true;
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}
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static enum drm_connector_status
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intel_hdmi_detect(struct drm_connector *connector, bool force)
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{
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struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
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struct drm_i915_private *dev_priv = connector->dev->dev_private;
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struct edid *edid;
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enum drm_connector_status status = connector_status_disconnected;
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intel_hdmi->has_hdmi_sink = false;
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intel_hdmi->has_audio = false;
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edid = drm_get_edid(connector,
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&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
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if (edid) {
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if (edid->input & DRM_EDID_INPUT_DIGITAL) {
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status = connector_status_connected;
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intel_hdmi->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
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intel_hdmi->has_audio = drm_detect_monitor_audio(edid);
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}
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connector->display_info.raw_edid = NULL;
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kfree(edid);
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}
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if (status == connector_status_connected) {
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if (intel_hdmi->force_audio)
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intel_hdmi->has_audio = intel_hdmi->force_audio > 0;
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}
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return status;
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}
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static int intel_hdmi_get_modes(struct drm_connector *connector)
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{
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struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
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struct drm_i915_private *dev_priv = connector->dev->dev_private;
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/* We should parse the EDID data and find out if it's an HDMI sink so
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* we can send audio to it.
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*/
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return intel_ddc_get_modes(connector,
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&dev_priv->gmbus[intel_hdmi->ddc_bus].adapter);
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}
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static int
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intel_hdmi_set_property(struct drm_connector *connector,
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struct drm_property *property,
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uint64_t val)
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{
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struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
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int ret;
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ret = drm_connector_property_set_value(connector, property, val);
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if (ret)
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return ret;
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if (property == intel_hdmi->force_audio_property) {
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if (val == intel_hdmi->force_audio)
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return 0;
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intel_hdmi->force_audio = val;
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if (val > 0 && intel_hdmi->has_audio)
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return 0;
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if (val < 0 && !intel_hdmi->has_audio)
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return 0;
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intel_hdmi->has_audio = val > 0;
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goto done;
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}
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return -EINVAL;
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done:
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if (intel_hdmi->base.base.crtc) {
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struct drm_crtc *crtc = intel_hdmi->base.base.crtc;
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drm_crtc_helper_set_mode(crtc, &crtc->mode,
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crtc->x, crtc->y,
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crtc->fb);
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}
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return 0;
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}
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static void intel_hdmi_destroy(struct drm_connector *connector)
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{
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drm_sysfs_connector_remove(connector);
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drm_connector_cleanup(connector);
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kfree(connector);
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}
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static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
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.dpms = intel_hdmi_dpms,
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.mode_fixup = intel_hdmi_mode_fixup,
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.prepare = intel_encoder_prepare,
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.mode_set = intel_hdmi_mode_set,
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.commit = intel_encoder_commit,
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};
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static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
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.dpms = drm_helper_connector_dpms,
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.detect = intel_hdmi_detect,
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.fill_modes = drm_helper_probe_single_connector_modes,
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.set_property = intel_hdmi_set_property,
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.destroy = intel_hdmi_destroy,
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};
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static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
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.get_modes = intel_hdmi_get_modes,
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.mode_valid = intel_hdmi_mode_valid,
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.best_encoder = intel_best_encoder,
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};
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static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
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.destroy = intel_encoder_destroy,
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};
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static void
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intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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intel_hdmi->force_audio_property =
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drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
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if (intel_hdmi->force_audio_property) {
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intel_hdmi->force_audio_property->values[0] = -1;
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intel_hdmi->force_audio_property->values[1] = 1;
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drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0);
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}
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}
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void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct drm_connector *connector;
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struct intel_encoder *intel_encoder;
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struct intel_connector *intel_connector;
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struct intel_hdmi *intel_hdmi;
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intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
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if (!intel_hdmi)
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return;
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intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
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if (!intel_connector) {
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kfree(intel_hdmi);
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return;
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}
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intel_encoder = &intel_hdmi->base;
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drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs,
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DRM_MODE_ENCODER_TMDS);
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connector = &intel_connector->base;
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drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
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DRM_MODE_CONNECTOR_HDMIA);
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drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
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intel_encoder->type = INTEL_OUTPUT_HDMI;
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connector->polled = DRM_CONNECTOR_POLL_HPD;
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connector->interlace_allowed = 0;
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connector->doublescan_allowed = 0;
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intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
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/* Set up the DDC bus. */
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if (sdvox_reg == SDVOB) {
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intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
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intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
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dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
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} else if (sdvox_reg == SDVOC) {
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intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
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intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
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dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
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} else if (sdvox_reg == HDMIB) {
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intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
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intel_hdmi->ddc_bus = GMBUS_PORT_DPB;
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dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
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} else if (sdvox_reg == HDMIC) {
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intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
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intel_hdmi->ddc_bus = GMBUS_PORT_DPC;
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dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
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} else if (sdvox_reg == HDMID) {
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intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
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intel_hdmi->ddc_bus = GMBUS_PORT_DPD;
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dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
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}
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intel_hdmi->sdvox_reg = sdvox_reg;
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drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
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intel_hdmi_add_properties(intel_hdmi, connector);
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intel_connector_attach_encoder(intel_connector, intel_encoder);
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drm_sysfs_connector_add(connector);
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/* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
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* 0xd. Failure to do so will result in spurious interrupts being
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* generated on the port when a cable is not attached.
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*/
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if (IS_G4X(dev) && !IS_GM45(dev)) {
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u32 temp = I915_READ(PEG_BAND_GAP_DATA);
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I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
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}
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}
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