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8186749621
core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larget cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP - mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJfK1atAAoJEAx081l5xIa+vDkQAJvl/mjbEA7fDy8Ysa0cgPLI 8nI4Bo/MaxkyRfUcP8+f/n3QQrRME37C0xa/Mn6SG1oFAdlovPwDqmDr5kjhkrMI geo8oJb2Q+AsrJr+ejpuF+iq0FxWi64bLbwJFJ2nBet+lHTMzoPceWeq3gG1Vvfl h6PV4B/9TjrnbhcKLIQSEmJ0kZp9uMkDBF/iynVn4+AKAkG1rQNjigdTH48IFPoz 28KuqG0B4NWu648zYXhjsN0kD3Dxjv3YOH+FsoWQpQa9icCTySYbySsQ7l0/XvA3 4BPtP3rWMhU46FHTBkWF72WQR4F0B4wm5DJJKMeG4vb1mXakOqAKcAq7JAbka+wL PBIiU+AcAKRSiwHmYDuDWtDoSpvYncuo0p3IvNP5hhih+7hqCnLIULDWS+V8AUzW 39usS/DXsVKk/HGYIYC89cRwsqWYD4c7edzOBdPQxW4LNYCD2gXezLJ5TeeR2lih y9JIVnPiluWleOovs4W3BoZNRuLc1rHBO6COToXjlme/48Z+sRHBAoge6UZurqRN jr+e60cS7n/DOeJQuNf4UHZnK48Pc24+3kVfMHlX+OKn8VuKPGr+USkeHV/NYL/B USiKCAxkkZM0dxerSb1/Ra9kGnchf0QBpA6Fsem8kV61Z4GVc+K6xJWg7KXB6n/3 7ZyalUKLwlOCz9sYsCCe =Yvtd -----END PGP SIGNATURE----- Merge tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "New xilinx displayport driver, AMD support for two new GPUs (more header files), i915 initial support for RocketLake and some work on their DG1 (discrete chip). The core also grew some lockdep annotations to try and constrain what drivers do with dma-fences, and added some documentation on why the idea of indefinite fences doesn't work. The long list is below. I do have some fixes trees outstanding, but I'll follow up with those later. core: - add user def flag to cmd line modes - dma_fence_wait added might_sleep - dma-fence lockdep annotations - indefinite fences are bad documentation - gem CMA functions used in more drivers - struct mutex removal - more drm_ debug macro usage - set/drop master api fixes - fix for drm/mm hole size comparison - drm/mm remove invalid entry optimization - optimise drm/mm hole handling - VRR debugfs added - uncompressed AFBC modifier support - multiple display id blocks in EDID - multiple driver sg handling fixes - __drm_atomic_helper_crtc_reset in all drivers - managed vram helpers ttm: - ttm_mem_reg handling cleanup - remove bo offset field - drop CMA memtype flag - drop mappable flag xilinx: - New Xilinx ZynqMP DisplayPort Subsystem driver nouveau: - add CRC support - start using NVIDIA published class header files - convert all push buffer emission to new macros - Proper push buffer space management for EVO/NVD channels. - firmware loading fixes - 2MiB system memory pages support on Pascal and newer vkms: - larger cursor support i915: - Rocketlake platform enablement - Early DG1 enablement - Numerous GEM refactorings - DP MST fixes - FBC, PSR, Cursor, Color, Gamma fixes - TGL, RKL, EHL workaround updates - TGL 8K display support fixes - SDVO/HDMI/DVI fixes amdgpu: - Initial support for Sienna Cichlid GPU - Initial support for Navy Flounder GPU - SI UVD/VCE support - expose rotation property - Add support for unique id on Arcturus - Enable runtime PM on vega10 boards that support BACO - Skip BAR resizing if the bios already did id - Major swSMU code cleanup - Fixes for DCN bandwidth calculations amdkfd: - Track SDMA usage per process - SMI events interface radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes msm: - headers regenerated causing churn - a650/a640 display and GPU enablement - dpu dither support for 6bpc panels - dpu cursor fix - dsi/mdp5 enablement for sdm630/sdm636/sdm66 tegra: - video capture prep support - reflection support mediatek: - convert mtk_dsi to bridge API meson: - FBC support sun4i: - iommu support rockchip: - register locking fix - per-pixel alpha support PX30 VOP mgag200: - ported to simple and shmem helpers - device init cleanups - use managed pci functions - dropped hw cursor support ast: - use managed pci functions - use managed VRAM helpers - rework cursor support malidp: - dev_groups support hibmc: - refactor hibmc_drv_vdac: vc4: - create TXP CRTC imx: - error path fixes and cleanups etnaviv: - clock handling and error handling cleanups - use pin_user_pages" * tag 'drm-next-2020-08-06' of git://anongit.freedesktop.org/drm/drm: (1747 commits) drm/msm: use kthread_create_worker instead of kthread_run drm/msm/mdp5: Add MDP5 configuration for SDM636/660 drm/msm/dsi: Add DSI configuration for SDM660 drm/msm/mdp5: Add MDP5 configuration for SDM630 drm/msm/dsi: Add phy configuration for SDM630/636/660 drm/msm/a6xx: add A640/A650 hwcg drm/msm/a6xx: hwcg tables in gpulist drm/msm/dpu: add SM8250 to hw catalog drm/msm/dpu: add SM8150 to hw catalog drm/msm/dpu: intf timing path for displayport drm/msm/dpu: set missing flush bits for INTF_2 and INTF_3 drm/msm/dpu: don't use INTF_INPUT_CTRL feature on sdm845 drm/msm/dpu: move some sspp caps to dpu_caps drm/msm/dpu: update UBWC config for sm8150 and sm8250 drm/msm/dpu: use right setup_blend_config for sm8150 and sm8250 drm/msm/a6xx: set ubwc config for A640 and A650 drm/msm/adreno: un-open-code some packets drm/msm: sync generated headers drm/msm/a6xx: add build_bw_table for A640/A650 drm/msm/a6xx: fix crashstate capture for A650 ...
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=====================
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DRM Memory Management
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=====================
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Modern Linux systems require large amount of graphics memory to store
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frame buffers, textures, vertices and other graphics-related data. Given
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the very dynamic nature of many of that data, managing graphics memory
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efficiently is thus crucial for the graphics stack and plays a central
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role in the DRM infrastructure.
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The DRM core includes two memory managers, namely Translation Table Maps
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(TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
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manager to be developed and tried to be a one-size-fits-them all
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solution. It provides a single userspace API to accommodate the need of
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all hardware, supporting both Unified Memory Architecture (UMA) devices
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and devices with dedicated video RAM (i.e. most discrete video cards).
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This resulted in a large, complex piece of code that turned out to be
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hard to use for driver development.
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GEM started as an Intel-sponsored project in reaction to TTM's
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complexity. Its design philosophy is completely different: instead of
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providing a solution to every graphics memory-related problems, GEM
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identified common code between drivers and created a support library to
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share it. GEM has simpler initialization and execution requirements than
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TTM, but has no video RAM management capabilities and is thus limited to
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UMA devices.
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The Translation Table Manager (TTM)
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===================================
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TTM design background and information belongs here.
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TTM initialization
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------------------
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**Warning**
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This section is outdated.
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Drivers wishing to support TTM must pass a filled :c:type:`ttm_bo_driver
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<ttm_bo_driver>` structure to ttm_bo_device_init, together with an
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initialized global reference to the memory manager. The ttm_bo_driver
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structure contains several fields with function pointers for
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initializing the TTM, allocating and freeing memory, waiting for command
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completion and fence synchronization, and memory migration.
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The :c:type:`struct drm_global_reference <drm_global_reference>` is made
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up of several fields:
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.. code-block:: c
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struct drm_global_reference {
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enum ttm_global_types global_type;
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size_t size;
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void *object;
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int (*init) (struct drm_global_reference *);
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void (*release) (struct drm_global_reference *);
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};
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There should be one global reference structure for your memory manager
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as a whole, and there will be others for each object created by the
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memory manager at runtime. Your global TTM should have a type of
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TTM_GLOBAL_TTM_MEM. The size field for the global object should be
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sizeof(struct ttm_mem_global), and the init and release hooks should
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point at your driver-specific init and release routines, which probably
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eventually call ttm_mem_global_init and ttm_mem_global_release,
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respectively.
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Once your global TTM accounting structure is set up and initialized by
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calling ttm_global_item_ref() on it, you need to create a buffer
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object TTM to provide a pool for buffer object allocation by clients and
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the kernel itself. The type of this object should be
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TTM_GLOBAL_TTM_BO, and its size should be sizeof(struct
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ttm_bo_global). Again, driver-specific init and release functions may
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be provided, likely eventually calling ttm_bo_global_ref_init() and
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ttm_bo_global_ref_release(), respectively. Also, like the previous
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object, ttm_global_item_ref() is used to create an initial reference
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count for the TTM, which will call your initialization function.
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See the radeon_ttm.c file for an example of usage.
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The Graphics Execution Manager (GEM)
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====================================
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The GEM design approach has resulted in a memory manager that doesn't
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provide full coverage of all (or even all common) use cases in its
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userspace or kernel API. GEM exposes a set of standard memory-related
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operations to userspace and a set of helper functions to drivers, and
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let drivers implement hardware-specific operations with their own
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private API.
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The GEM userspace API is described in the `GEM - the Graphics Execution
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Manager <http://lwn.net/Articles/283798/>`__ article on LWN. While
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slightly outdated, the document provides a good overview of the GEM API
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principles. Buffer allocation and read and write operations, described
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as part of the common GEM API, are currently implemented using
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driver-specific ioctls.
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GEM is data-agnostic. It manages abstract buffer objects without knowing
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what individual buffers contain. APIs that require knowledge of buffer
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contents or purpose, such as buffer allocation or synchronization
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primitives, are thus outside of the scope of GEM and must be implemented
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using driver-specific ioctls.
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On a fundamental level, GEM involves several operations:
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- Memory allocation and freeing
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- Command execution
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- Aperture management at command execution time
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Buffer object allocation is relatively straightforward and largely
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provided by Linux's shmem layer, which provides memory to back each
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object.
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Device-specific operations, such as command execution, pinning, buffer
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read & write, mapping, and domain ownership transfers are left to
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driver-specific ioctls.
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GEM Initialization
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------------------
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Drivers that use GEM must set the DRIVER_GEM bit in the struct
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:c:type:`struct drm_driver <drm_driver>` driver_features
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field. The DRM core will then automatically initialize the GEM core
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before calling the load operation. Behind the scene, this will create a
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DRM Memory Manager object which provides an address space pool for
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object allocation.
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In a KMS configuration, drivers need to allocate and initialize a
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command ring buffer following core GEM initialization if required by the
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hardware. UMA devices usually have what is called a "stolen" memory
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region, which provides space for the initial framebuffer and large,
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contiguous memory regions required by the device. This space is
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typically not managed by GEM, and must be initialized separately into
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its own DRM MM object.
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GEM Objects Creation
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--------------------
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GEM splits creation of GEM objects and allocation of the memory that
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backs them in two distinct operations.
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GEM objects are represented by an instance of struct :c:type:`struct
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drm_gem_object <drm_gem_object>`. Drivers usually need to
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extend GEM objects with private information and thus create a
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driver-specific GEM object structure type that embeds an instance of
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struct :c:type:`struct drm_gem_object <drm_gem_object>`.
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To create a GEM object, a driver allocates memory for an instance of its
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specific GEM object type and initializes the embedded struct
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:c:type:`struct drm_gem_object <drm_gem_object>` with a call
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to drm_gem_object_init(). The function takes a pointer
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to the DRM device, a pointer to the GEM object and the buffer object
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size in bytes.
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GEM uses shmem to allocate anonymous pageable memory.
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drm_gem_object_init() will create an shmfs file of the
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requested size and store it into the struct :c:type:`struct
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drm_gem_object <drm_gem_object>` filp field. The memory is
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used as either main storage for the object when the graphics hardware
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uses system memory directly or as a backing store otherwise.
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Drivers are responsible for the actual physical pages allocation by
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calling shmem_read_mapping_page_gfp() for each page.
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Note that they can decide to allocate pages when initializing the GEM
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object, or to delay allocation until the memory is needed (for instance
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when a page fault occurs as a result of a userspace memory access or
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when the driver needs to start a DMA transfer involving the memory).
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Anonymous pageable memory allocation is not always desired, for instance
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when the hardware requires physically contiguous system memory as is
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often the case in embedded devices. Drivers can create GEM objects with
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no shmfs backing (called private GEM objects) by initializing them with a call
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to drm_gem_private_object_init() instead of drm_gem_object_init(). Storage for
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private GEM objects must be managed by drivers.
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GEM Objects Lifetime
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--------------------
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All GEM objects are reference-counted by the GEM core. References can be
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acquired and release by calling drm_gem_object_get() and drm_gem_object_put()
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respectively.
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When the last reference to a GEM object is released the GEM core calls
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the :c:type:`struct drm_driver <drm_driver>` gem_free_object_unlocked
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operation. That operation is mandatory for GEM-enabled drivers and must
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free the GEM object and all associated resources.
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void (\*gem_free_object) (struct drm_gem_object \*obj); Drivers are
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responsible for freeing all GEM object resources. This includes the
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resources created by the GEM core, which need to be released with
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drm_gem_object_release().
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GEM Objects Naming
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------------------
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Communication between userspace and the kernel refers to GEM objects
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using local handles, global names or, more recently, file descriptors.
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All of those are 32-bit integer values; the usual Linux kernel limits
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apply to the file descriptors.
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GEM handles are local to a DRM file. Applications get a handle to a GEM
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object through a driver-specific ioctl, and can use that handle to refer
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to the GEM object in other standard or driver-specific ioctls. Closing a
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DRM file handle frees all its GEM handles and dereferences the
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associated GEM objects.
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To create a handle for a GEM object drivers call drm_gem_handle_create(). The
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function takes a pointer to the DRM file and the GEM object and returns a
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locally unique handle. When the handle is no longer needed drivers delete it
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with a call to drm_gem_handle_delete(). Finally the GEM object associated with a
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handle can be retrieved by a call to drm_gem_object_lookup().
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Handles don't take ownership of GEM objects, they only take a reference
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to the object that will be dropped when the handle is destroyed. To
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avoid leaking GEM objects, drivers must make sure they drop the
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reference(s) they own (such as the initial reference taken at object
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creation time) as appropriate, without any special consideration for the
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handle. For example, in the particular case of combined GEM object and
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handle creation in the implementation of the dumb_create operation,
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drivers must drop the initial reference to the GEM object before
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returning the handle.
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GEM names are similar in purpose to handles but are not local to DRM
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files. They can be passed between processes to reference a GEM object
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globally. Names can't be used directly to refer to objects in the DRM
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API, applications must convert handles to names and names to handles
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using the DRM_IOCTL_GEM_FLINK and DRM_IOCTL_GEM_OPEN ioctls
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respectively. The conversion is handled by the DRM core without any
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driver-specific support.
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GEM also supports buffer sharing with dma-buf file descriptors through
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PRIME. GEM-based drivers must use the provided helpers functions to
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implement the exporting and importing correctly. See ?. Since sharing
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file descriptors is inherently more secure than the easily guessable and
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global GEM names it is the preferred buffer sharing mechanism. Sharing
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buffers through GEM names is only supported for legacy userspace.
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Furthermore PRIME also allows cross-device buffer sharing since it is
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based on dma-bufs.
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GEM Objects Mapping
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-------------------
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Because mapping operations are fairly heavyweight GEM favours
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read/write-like access to buffers, implemented through driver-specific
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ioctls, over mapping buffers to userspace. However, when random access
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to the buffer is needed (to perform software rendering for instance),
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direct access to the object can be more efficient.
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The mmap system call can't be used directly to map GEM objects, as they
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don't have their own file handle. Two alternative methods currently
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co-exist to map GEM objects to userspace. The first method uses a
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driver-specific ioctl to perform the mapping operation, calling
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do_mmap() under the hood. This is often considered
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dubious, seems to be discouraged for new GEM-enabled drivers, and will
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thus not be described here.
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The second method uses the mmap system call on the DRM file handle. void
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\*mmap(void \*addr, size_t length, int prot, int flags, int fd, off_t
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offset); DRM identifies the GEM object to be mapped by a fake offset
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passed through the mmap offset argument. Prior to being mapped, a GEM
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object must thus be associated with a fake offset. To do so, drivers
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must call drm_gem_create_mmap_offset() on the object.
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Once allocated, the fake offset value must be passed to the application
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in a driver-specific way and can then be used as the mmap offset
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argument.
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The GEM core provides a helper method drm_gem_mmap() to
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handle object mapping. The method can be set directly as the mmap file
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operation handler. It will look up the GEM object based on the offset
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value and set the VMA operations to the :c:type:`struct drm_driver
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<drm_driver>` gem_vm_ops field. Note that drm_gem_mmap() doesn't map memory to
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userspace, but relies on the driver-provided fault handler to map pages
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individually.
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To use drm_gem_mmap(), drivers must fill the struct :c:type:`struct drm_driver
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<drm_driver>` gem_vm_ops field with a pointer to VM operations.
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The VM operations is a :c:type:`struct vm_operations_struct <vm_operations_struct>`
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made up of several fields, the more interesting ones being:
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.. code-block:: c
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struct vm_operations_struct {
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void (*open)(struct vm_area_struct * area);
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void (*close)(struct vm_area_struct * area);
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vm_fault_t (*fault)(struct vm_fault *vmf);
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};
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The open and close operations must update the GEM object reference
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count. Drivers can use the drm_gem_vm_open() and drm_gem_vm_close() helper
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functions directly as open and close handlers.
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The fault operation handler is responsible for mapping individual pages
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to userspace when a page fault occurs. Depending on the memory
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allocation scheme, drivers can allocate pages at fault time, or can
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decide to allocate memory for the GEM object at the time the object is
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created.
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Drivers that want to map the GEM object upfront instead of handling page
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faults can implement their own mmap file operation handler.
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For platforms without MMU the GEM core provides a helper method
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drm_gem_cma_get_unmapped_area(). The mmap() routines will call this to get a
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proposed address for the mapping.
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To use drm_gem_cma_get_unmapped_area(), drivers must fill the struct
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:c:type:`struct file_operations <file_operations>` get_unmapped_area field with
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a pointer on drm_gem_cma_get_unmapped_area().
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More detailed information about get_unmapped_area can be found in
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Documentation/admin-guide/mm/nommu-mmap.rst
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Memory Coherency
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----------------
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When mapped to the device or used in a command buffer, backing pages for
|
|
an object are flushed to memory and marked write combined so as to be
|
|
coherent with the GPU. Likewise, if the CPU accesses an object after the
|
|
GPU has finished rendering to the object, then the object must be made
|
|
coherent with the CPU's view of memory, usually involving GPU cache
|
|
flushing of various kinds. This core CPU<->GPU coherency management is
|
|
provided by a device-specific ioctl, which evaluates an object's current
|
|
domain and performs any necessary flushing or synchronization to put the
|
|
object into the desired coherency domain (note that the object may be
|
|
busy, i.e. an active render target; in that case, setting the domain
|
|
blocks the client and waits for rendering to complete before performing
|
|
any necessary flushing operations).
|
|
|
|
Command Execution
|
|
-----------------
|
|
|
|
Perhaps the most important GEM function for GPU devices is providing a
|
|
command execution interface to clients. Client programs construct
|
|
command buffers containing references to previously allocated memory
|
|
objects, and then submit them to GEM. At that point, GEM takes care to
|
|
bind all the objects into the GTT, execute the buffer, and provide
|
|
necessary synchronization between clients accessing the same buffers.
|
|
This often involves evicting some objects from the GTT and re-binding
|
|
others (a fairly expensive operation), and providing relocation support
|
|
which hides fixed GTT offsets from clients. Clients must take care not
|
|
to submit command buffers that reference more objects than can fit in
|
|
the GTT; otherwise, GEM will reject them and no rendering will occur.
|
|
Similarly, if several objects in the buffer require fence registers to
|
|
be allocated for correct rendering (e.g. 2D blits on pre-965 chips),
|
|
care must be taken not to require more fence registers than are
|
|
available to the client. Such resource management should be abstracted
|
|
from the client in libdrm.
|
|
|
|
GEM Function Reference
|
|
----------------------
|
|
|
|
.. kernel-doc:: include/drm/drm_gem.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem.c
|
|
:export:
|
|
|
|
GEM CMA Helper Functions Reference
|
|
----------------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c
|
|
:doc: cma helpers
|
|
|
|
.. kernel-doc:: include/drm/drm_gem_cma_helper.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c
|
|
:export:
|
|
|
|
GEM SHMEM Helper Function Reference
|
|
-----------------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
|
|
:doc: overview
|
|
|
|
.. kernel-doc:: include/drm/drm_gem_shmem_helper.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_shmem_helper.c
|
|
:export:
|
|
|
|
GEM VRAM Helper Functions Reference
|
|
-----------------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_vram_helper.c
|
|
:doc: overview
|
|
|
|
.. kernel-doc:: include/drm/drm_gem_vram_helper.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_vram_helper.c
|
|
:export:
|
|
|
|
GEM TTM Helper Functions Reference
|
|
-----------------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_ttm_helper.c
|
|
:doc: overview
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_gem_ttm_helper.c
|
|
:export:
|
|
|
|
VMA Offset Manager
|
|
==================
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_vma_manager.c
|
|
:doc: vma offset manager
|
|
|
|
.. kernel-doc:: include/drm/drm_vma_manager.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_vma_manager.c
|
|
:export:
|
|
|
|
.. _prime_buffer_sharing:
|
|
|
|
PRIME Buffer Sharing
|
|
====================
|
|
|
|
PRIME is the cross device buffer sharing framework in drm, originally
|
|
created for the OPTIMUS range of multi-gpu platforms. To userspace PRIME
|
|
buffers are dma-buf based file descriptors.
|
|
|
|
Overview and Lifetime Rules
|
|
---------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_prime.c
|
|
:doc: overview and lifetime rules
|
|
|
|
PRIME Helper Functions
|
|
----------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_prime.c
|
|
:doc: PRIME Helpers
|
|
|
|
PRIME Function References
|
|
-------------------------
|
|
|
|
.. kernel-doc:: include/drm/drm_prime.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_prime.c
|
|
:export:
|
|
|
|
DRM MM Range Allocator
|
|
======================
|
|
|
|
Overview
|
|
--------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_mm.c
|
|
:doc: Overview
|
|
|
|
LRU Scan/Eviction Support
|
|
-------------------------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_mm.c
|
|
:doc: lru scan roster
|
|
|
|
DRM MM Range Allocator Function References
|
|
------------------------------------------
|
|
|
|
.. kernel-doc:: include/drm/drm_mm.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_mm.c
|
|
:export:
|
|
|
|
DRM Cache Handling
|
|
==================
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_cache.c
|
|
:export:
|
|
|
|
DRM Sync Objects
|
|
===========================
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
|
|
:doc: Overview
|
|
|
|
.. kernel-doc:: include/drm/drm_syncobj.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
|
|
:export:
|
|
|
|
GPU Scheduler
|
|
=============
|
|
|
|
Overview
|
|
--------
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/scheduler/sched_main.c
|
|
:doc: Overview
|
|
|
|
Scheduler Function References
|
|
-----------------------------
|
|
|
|
.. kernel-doc:: include/drm/gpu_scheduler.h
|
|
:internal:
|
|
|
|
.. kernel-doc:: drivers/gpu/drm/scheduler/sched_main.c
|
|
:export:
|