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This node is intended to allow SoC reset in case of software reset or appropriate watchdogs. The Keystone SoCs can contain up to 4 watchdog timers to reset SoC. Each watchdog timer event input is connected to the Reset Mux block. The Reset Mux block can be configured to cause reset or not. Additionally soft or hard reset can be configured. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> [santosh.shilimkar@ti.com: Fixed the subject line] Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> |
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keystone-reset.txt |