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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 42 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190524100845.259718220@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
306 lines
7.3 KiB
C
306 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Linux/PA-RISC Project (http://www.parisc-linux.org/)
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*
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* Floating-point emulation code
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* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
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*/
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/*
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* BEGIN_DESC
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*
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* File:
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* @(#) pa/spmath/fcnvuf.c $Revision: 1.1 $
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*
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* Purpose:
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* Fixed point to Floating-point Converts
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*
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* External Interfaces:
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* dbl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
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* dbl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
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* sgl_to_dbl_fcnvuf(srcptr,nullptr,dstptr,status)
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* sgl_to_sgl_fcnvuf(srcptr,nullptr,dstptr,status)
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*
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* Internal Interfaces:
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*
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* Theory:
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* <<please update with a overview of the operation of this file>>
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*
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* END_DESC
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*/
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#include "float.h"
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#include "sgl_float.h"
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#include "dbl_float.h"
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#include "cnv_float.h"
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/************************************************************************
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* Fixed point to Floating-point Converts *
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************************************************************************/
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/*
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* Convert Single Unsigned Fixed to Single Floating-point format
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*/
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int
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sgl_to_sgl_fcnvuf(
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unsigned int *srcptr,
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unsigned int *nullptr,
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sgl_floating_point *dstptr,
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unsigned int *status)
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{
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register unsigned int src, result = 0;
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register int dst_exponent;
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src = *srcptr;
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/* Check for zero */
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if (src == 0) {
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Sgl_setzero(result);
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(src,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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src <<= dst_exponent+1;
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Sgl_set_mantissa(result, src >> SGL_EXP_LENGTH);
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Sgl_set_exponent(result, 30+SGL_BIAS - dst_exponent);
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/* check for inexact */
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if (Suint_isinexact_to_sgl(src)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Sgl_increment(result);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Sgl_roundnearest_from_suint(src,result);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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*dstptr = result;
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Single Unsigned Fixed to Double Floating-point
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*/
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int
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sgl_to_dbl_fcnvuf(
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unsigned int *srcptr,
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unsigned int *nullptr,
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dbl_floating_point *dstptr,
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unsigned int *status)
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{
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register int dst_exponent;
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register unsigned int src, resultp1 = 0, resultp2 = 0;
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src = *srcptr;
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/* Check for zero */
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if (src == 0) {
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Dbl_setzero(resultp1,resultp2);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(src,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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src <<= dst_exponent+1;
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Dbl_set_mantissap1(resultp1, src >> DBL_EXP_LENGTH);
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Dbl_set_mantissap2(resultp2, src << (32-DBL_EXP_LENGTH));
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Dbl_set_exponent(resultp1, (30+DBL_BIAS) - dst_exponent);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Double Unsigned Fixed to Single Floating-point
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*/
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int
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dbl_to_sgl_fcnvuf(
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dbl_unsigned *srcptr,
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unsigned int *nullptr,
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sgl_floating_point *dstptr,
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unsigned int *status)
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{
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int dst_exponent;
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unsigned int srcp1, srcp2, result = 0;
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Duint_copyfromptr(srcptr,srcp1,srcp2);
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/* Check for zero */
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if (srcp1 == 0 && srcp2 == 0) {
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Sgl_setzero(result);
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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if (srcp1 == 0) {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp2,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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srcp1 = srcp2 << dst_exponent+1;
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srcp2 = 0;
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/*
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* since msb set is in second word, need to
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* adjust bit position count
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*/
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dst_exponent += 32;
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}
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else {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*
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*/
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Find_ms_one_bit(srcp1,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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if (dst_exponent >= 0) {
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Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
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srcp1);
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srcp2 <<= dst_exponent+1;
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}
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}
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Sgl_set_mantissa(result, srcp1 >> SGL_EXP_LENGTH);
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Sgl_set_exponent(result, (62+SGL_BIAS) - dst_exponent);
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/* check for inexact */
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if (Duint_isinexact_to_sgl(srcp1,srcp2)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Sgl_increment(result);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Sgl_roundnearest_from_duint(srcp1,srcp2,result);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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*dstptr = result;
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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*dstptr = result;
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return(NOEXCEPTION);
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}
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/*
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* Double Unsigned Fixed to Double Floating-point
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*/
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int
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dbl_to_dbl_fcnvuf(
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dbl_unsigned *srcptr,
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unsigned int *nullptr,
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dbl_floating_point *dstptr,
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unsigned int *status)
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{
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register int dst_exponent;
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register unsigned int srcp1, srcp2, resultp1 = 0, resultp2 = 0;
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Duint_copyfromptr(srcptr,srcp1,srcp2);
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/* Check for zero */
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if (srcp1 == 0 && srcp2 ==0) {
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Dbl_setzero(resultp1,resultp2);
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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/*
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* Generate exponent and normalized mantissa
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*/
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dst_exponent = 16; /* initialize for normalization */
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if (srcp1 == 0) {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp2,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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srcp1 = srcp2 << dst_exponent+1;
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srcp2 = 0;
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/*
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* since msb set is in second word, need to
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* adjust bit position count
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*/
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dst_exponent += 32;
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}
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else {
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/*
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* Check word for most significant bit set. Returns
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* a value in dst_exponent indicating the bit position,
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* between -1 and 30.
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*/
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Find_ms_one_bit(srcp1,dst_exponent);
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/* left justify source, with msb at bit position 0 */
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if (dst_exponent >= 0) {
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Variable_shift_double(srcp1,srcp2,(31-dst_exponent),
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srcp1);
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srcp2 <<= dst_exponent+1;
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}
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}
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Dbl_set_mantissap1(resultp1, srcp1 >> DBL_EXP_LENGTH);
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Shiftdouble(srcp1,srcp2,DBL_EXP_LENGTH,resultp2);
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Dbl_set_exponent(resultp1, (62+DBL_BIAS) - dst_exponent);
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/* check for inexact */
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if (Duint_isinexact_to_dbl(srcp2)) {
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switch (Rounding_mode()) {
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case ROUNDPLUS:
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Dbl_increment(resultp1,resultp2);
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break;
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case ROUNDMINUS: /* never negative */
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break;
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case ROUNDNEAREST:
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Dbl_roundnearest_from_duint(srcp2,resultp1,
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resultp2);
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break;
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}
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if (Is_inexacttrap_enabled()) {
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(INEXACTEXCEPTION);
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}
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else Set_inexactflag();
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}
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Dbl_copytoptr(resultp1,resultp2,dstptr);
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return(NOEXCEPTION);
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}
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