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This SD/eMMC controller is used for UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
56 lines
1.9 KiB
Plaintext
56 lines
1.9 KiB
Plaintext
UniPhier SD/eMMC controller
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Required properties:
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- compatible: should be one of the following:
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"socionext,uniphier-sd-v2.91" - IP version 2.91
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"socionext,uniphier-sd-v3.1" - IP version 3.1
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"socionext,uniphier-sd-v3.1.1" - IP version 3.1.1
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- reg: offset and length of the register set for the device.
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- interrupts: a single interrupt specifier.
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- clocks: a single clock specifier of the controller clock.
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- reset-names: should contain the following:
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"host" - mandatory for all versions
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"bridge" - should exist only for "socionext,uniphier-sd-v2.91"
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"hw" - should exist if eMMC hw reset line is available
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- resets: a list of reset specifiers, corresponding to the reset-names
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Optional properties:
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- pinctrl-names: if present, should contain the following:
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"default" - should exist for all instances
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"uhs" - should exist for SD instance with UHS support
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- pinctrl-0: pin control state for the default mode
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- pinctrl-1: pin control state for the UHS mode
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- dma-names: should be "rx-tx" if present.
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This property can exist only for "socionext,uniphier-sd-v2.91".
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- dmas: a single DMA channel specifier
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This property can exist only for "socionext,uniphier-sd-v2.91".
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- bus-width: see mmc.txt
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- cap-sd-highspeed: see mmc.txt
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- cap-mmc-highspeed: see mmc.txt
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- sd-uhs-sdr12: see mmc.txt
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- sd-uhs-sdr25: see mmc.txt
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- sd-uhs-sdr50: see mmc.txt
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- cap-mmc-hw-reset: should exist if reset-names contains "hw". see mmc.txt
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- non-removable: see mmc.txt
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Example:
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sd: sdhc@5a400000 {
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compatible = "socionext,uniphier-sd-v2.91";
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reg = <0x5a400000 0x200>;
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interrupts = <0 76 4>;
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pinctrl-names = "default", "uhs";
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pinctrl-0 = <&pinctrl_sd>;
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pinctrl-1 = <&pinctrl_sd_uhs>;
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clocks = <&mio_clk 0>;
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reset-names = "host", "bridge";
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resets = <&mio_rst 0>, <&mio_rst 3>;
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dma-names = "rx-tx";
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dmas = <&dmac 4>;
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bus-width = <4>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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};
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