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9c7aea8e17
Add dt-bindings headers for the Meson-AXG's AO clock and reset controller. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
27 lines
695 B
C
27 lines
695 B
C
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright (c) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2018 Amlogic, inc.
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* Author: Qiufang Dai <qiufang.dai@amlogic.com>
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*/
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#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
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#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_AXG_AOCLK
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#define CLKID_AO_REMOTE 0
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#define CLKID_AO_I2C_MASTER 1
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#define CLKID_AO_I2C_SLAVE 2
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#define CLKID_AO_UART1 3
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#define CLKID_AO_UART2 4
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#define CLKID_AO_IR_BLASTER 5
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#define CLKID_AO_SAR_ADC 6
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#define CLKID_AO_CLK81 7
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#define CLKID_AO_SAR_ADC_SEL 8
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#define CLKID_AO_SAR_ADC_DIV 9
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#define CLKID_AO_SAR_ADC_CLK 10
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#define CLKID_AO_ALT_XTAL 11
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#endif
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