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The 'mutex' in struct w1_master is use for two very different purposes. Firstly it protects various data structures such as the list of all slaves. Secondly it protects the w1 buss against concurrent accesses. This can lead to deadlocks when the ->probe code called while adding a slave needs to talk on the bus, as is the case for power_supply devices. ds2780 and ds2781 drivers contain a work around to track which process hold the lock simply to avoid this deadlock. bq27000 doesn't have that work around and so deadlocks. There are other possible deadlocks involving sysfs. When removing a device the sysfs s_active lock is held, so the lock that protects the slave list must take precedence over s_active. However when access power_supply attributes via sysfs, the s_active lock must take precedence over the lock that protects accesses to the bus. So to avoid deadlocks between w1 slaves and sysfs, these must be two separate locks. Making them separate means that the work around in ds2780 and ds2781 can be removed. So this patch: - adds a new mutex: "bus_mutex" which serialises access to the bus. - takes in mutex in w1_search and ds1wm_search while they access the bus for searching. The mutex is dropped before calling the callback which adds the slave. - changes all slaves to use bus_mutex instead of mutex to protect access to the bus - removes w1_ds2790_io_nolock and w1_ds2781_io_nolock, and the related code from drivers/power/ds278[01]_battery.c which calls them. Signed-off-by: NeilBrown <neilb@suse.de> Acked-by: Evgeniy Polyakov <zbr@ioremap.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
130 lines
3.9 KiB
C
130 lines
3.9 KiB
C
/*
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* 1-Wire implementation for the ds2780 chip
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*
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* Copyright (C) 2010 Indesign, LLC
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*
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* Author: Clifton Barnes <cabarnes@indesign-llc.com>
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*
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* Based on w1-ds2760 driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef _W1_DS2780_H
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#define _W1_DS2780_H
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/* Function commands */
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#define W1_DS2780_READ_DATA 0x69
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#define W1_DS2780_WRITE_DATA 0x6C
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#define W1_DS2780_COPY_DATA 0x48
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#define W1_DS2780_RECALL_DATA 0xB8
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#define W1_DS2780_LOCK 0x6A
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/* Register map */
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/* Register 0x00 Reserved */
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#define DS2780_STATUS_REG 0x01
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#define DS2780_RAAC_MSB_REG 0x02
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#define DS2780_RAAC_LSB_REG 0x03
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#define DS2780_RSAC_MSB_REG 0x04
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#define DS2780_RSAC_LSB_REG 0x05
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#define DS2780_RARC_REG 0x06
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#define DS2780_RSRC_REG 0x07
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#define DS2780_IAVG_MSB_REG 0x08
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#define DS2780_IAVG_LSB_REG 0x09
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#define DS2780_TEMP_MSB_REG 0x0A
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#define DS2780_TEMP_LSB_REG 0x0B
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#define DS2780_VOLT_MSB_REG 0x0C
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#define DS2780_VOLT_LSB_REG 0x0D
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#define DS2780_CURRENT_MSB_REG 0x0E
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#define DS2780_CURRENT_LSB_REG 0x0F
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#define DS2780_ACR_MSB_REG 0x10
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#define DS2780_ACR_LSB_REG 0x11
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#define DS2780_ACRL_MSB_REG 0x12
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#define DS2780_ACRL_LSB_REG 0x13
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#define DS2780_AS_REG 0x14
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#define DS2780_SFR_REG 0x15
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#define DS2780_FULL_MSB_REG 0x16
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#define DS2780_FULL_LSB_REG 0x17
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#define DS2780_AE_MSB_REG 0x18
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#define DS2780_AE_LSB_REG 0x19
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#define DS2780_SE_MSB_REG 0x1A
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#define DS2780_SE_LSB_REG 0x1B
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/* Register 0x1C - 0x1E Reserved */
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#define DS2780_EEPROM_REG 0x1F
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#define DS2780_EEPROM_BLOCK0_START 0x20
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/* Register 0x20 - 0x2F User EEPROM */
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#define DS2780_EEPROM_BLOCK0_END 0x2F
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/* Register 0x30 - 0x5F Reserved */
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#define DS2780_EEPROM_BLOCK1_START 0x60
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#define DS2780_CONTROL_REG 0x60
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#define DS2780_AB_REG 0x61
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#define DS2780_AC_MSB_REG 0x62
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#define DS2780_AC_LSB_REG 0x63
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#define DS2780_VCHG_REG 0x64
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#define DS2780_IMIN_REG 0x65
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#define DS2780_VAE_REG 0x66
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#define DS2780_IAE_REG 0x67
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#define DS2780_AE_40_REG 0x68
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#define DS2780_RSNSP_REG 0x69
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#define DS2780_FULL_40_MSB_REG 0x6A
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#define DS2780_FULL_40_LSB_REG 0x6B
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#define DS2780_FULL_3040_SLOPE_REG 0x6C
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#define DS2780_FULL_2030_SLOPE_REG 0x6D
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#define DS2780_FULL_1020_SLOPE_REG 0x6E
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#define DS2780_FULL_0010_SLOPE_REG 0x6F
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#define DS2780_AE_3040_SLOPE_REG 0x70
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#define DS2780_AE_2030_SLOPE_REG 0x71
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#define DS2780_AE_1020_SLOPE_REG 0x72
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#define DS2780_AE_0010_SLOPE_REG 0x73
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#define DS2780_SE_3040_SLOPE_REG 0x74
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#define DS2780_SE_2030_SLOPE_REG 0x75
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#define DS2780_SE_1020_SLOPE_REG 0x76
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#define DS2780_SE_0010_SLOPE_REG 0x77
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#define DS2780_RSGAIN_MSB_REG 0x78
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#define DS2780_RSGAIN_LSB_REG 0x79
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#define DS2780_RSTC_REG 0x7A
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#define DS2780_FRSGAIN_MSB_REG 0x7B
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#define DS2780_FRSGAIN_LSB_REG 0x7C
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#define DS2780_EEPROM_BLOCK1_END 0x7C
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/* Register 0x7D - 0xFF Reserved */
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/* Number of valid register addresses */
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#define DS2780_DATA_SIZE 0x80
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/* Status register bits */
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#define DS2780_STATUS_REG_CHGTF (1 << 7)
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#define DS2780_STATUS_REG_AEF (1 << 6)
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#define DS2780_STATUS_REG_SEF (1 << 5)
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#define DS2780_STATUS_REG_LEARNF (1 << 4)
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/* Bit 3 Reserved */
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#define DS2780_STATUS_REG_UVF (1 << 2)
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#define DS2780_STATUS_REG_PORF (1 << 1)
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/* Bit 0 Reserved */
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/* Control register bits */
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/* Bit 7 Reserved */
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#define DS2780_CONTROL_REG_UVEN (1 << 6)
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#define DS2780_CONTROL_REG_PMOD (1 << 5)
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#define DS2780_CONTROL_REG_RNAOP (1 << 4)
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/* Bit 0 - 3 Reserved */
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/* Special feature register bits */
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/* Bit 1 - 7 Reserved */
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#define DS2780_SFR_REG_PIOSC (1 << 0)
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/* EEPROM register bits */
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#define DS2780_EEPROM_REG_EEC (1 << 7)
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#define DS2780_EEPROM_REG_LOCK (1 << 6)
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/* Bit 2 - 6 Reserved */
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#define DS2780_EEPROM_REG_BL1 (1 << 1)
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#define DS2780_EEPROM_REG_BL0 (1 << 0)
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extern int w1_ds2780_io(struct device *dev, char *buf, int addr, size_t count,
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int io);
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extern int w1_ds2780_eeprom_cmd(struct device *dev, int addr, int cmd);
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#endif /* !_W1_DS2780_H */
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