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930ab34d90
This patch adds AVX assembly accelerated implementation of SM3 secure hash algorithm. From the benchmark data, compared to pure software implementation sm3-generic, the performance increase is up to 38%. The main algorithm implementation based on SM3 AES/BMI2 accelerated work by libgcrypt at: https://gnupg.org/software/libgcrypt/index.html Benchmark on Intel i5-6200U 2.30GHz, performance data of two implementations, pure software sm3-generic and sm3-avx acceleration. The data comes from the 326 mode and 422 mode of tcrypt. The abscissas are different lengths of per update. The data is tabulated and the unit is Mb/s: update-size | 16 64 256 1024 2048 4096 8192 ------------+------------------------------------------------------- sm3-generic | 105.97 129.60 182.12 189.62 188.06 193.66 194.88 sm3-avx | 119.87 163.05 244.44 260.92 257.60 264.87 265.88 Signed-off-by: Tianjia Zhang <tianjia.zhang@linux.alibaba.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
135 lines
3.1 KiB
C
135 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* SM3 Secure Hash Algorithm, AVX assembler accelerated.
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* specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
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*
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* Copyright (C) 2021 Tianjia Zhang <tianjia.zhang@linux.alibaba.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <crypto/internal/hash.h>
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#include <crypto/internal/simd.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <crypto/sm3.h>
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#include <crypto/sm3_base.h>
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#include <asm/simd.h>
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asmlinkage void sm3_transform_avx(struct sm3_state *state,
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const u8 *data, int nblocks);
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static int sm3_avx_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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struct sm3_state *sctx = shash_desc_ctx(desc);
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if (!crypto_simd_usable() ||
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(sctx->count % SM3_BLOCK_SIZE) + len < SM3_BLOCK_SIZE) {
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sm3_update(sctx, data, len);
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return 0;
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}
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/*
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* Make sure struct sm3_state begins directly with the SM3
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* 256-bit internal state, as this is what the asm functions expect.
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*/
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BUILD_BUG_ON(offsetof(struct sm3_state, state) != 0);
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kernel_fpu_begin();
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sm3_base_do_update(desc, data, len, sm3_transform_avx);
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kernel_fpu_end();
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return 0;
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}
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static int sm3_avx_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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if (!crypto_simd_usable()) {
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struct sm3_state *sctx = shash_desc_ctx(desc);
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if (len)
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sm3_update(sctx, data, len);
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sm3_final(sctx, out);
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return 0;
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}
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kernel_fpu_begin();
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if (len)
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sm3_base_do_update(desc, data, len, sm3_transform_avx);
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sm3_base_do_finalize(desc, sm3_transform_avx);
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kernel_fpu_end();
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return sm3_base_finish(desc, out);
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}
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static int sm3_avx_final(struct shash_desc *desc, u8 *out)
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{
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if (!crypto_simd_usable()) {
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sm3_final(shash_desc_ctx(desc), out);
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return 0;
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}
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kernel_fpu_begin();
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sm3_base_do_finalize(desc, sm3_transform_avx);
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kernel_fpu_end();
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return sm3_base_finish(desc, out);
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}
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static struct shash_alg sm3_avx_alg = {
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.digestsize = SM3_DIGEST_SIZE,
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.init = sm3_base_init,
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.update = sm3_avx_update,
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.final = sm3_avx_final,
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.finup = sm3_avx_finup,
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.descsize = sizeof(struct sm3_state),
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.base = {
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.cra_name = "sm3",
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.cra_driver_name = "sm3-avx",
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.cra_priority = 300,
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.cra_blocksize = SM3_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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}
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};
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static int __init sm3_avx_mod_init(void)
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{
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const char *feature_name;
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if (!boot_cpu_has(X86_FEATURE_AVX)) {
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pr_info("AVX instruction are not detected.\n");
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return -ENODEV;
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}
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if (!boot_cpu_has(X86_FEATURE_BMI2)) {
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pr_info("BMI2 instruction are not detected.\n");
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return -ENODEV;
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}
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if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
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&feature_name)) {
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pr_info("CPU feature '%s' is not supported.\n", feature_name);
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return -ENODEV;
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}
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return crypto_register_shash(&sm3_avx_alg);
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}
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static void __exit sm3_avx_mod_exit(void)
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{
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crypto_unregister_shash(&sm3_avx_alg);
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}
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module_init(sm3_avx_mod_init);
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module_exit(sm3_avx_mod_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Tianjia Zhang <tianjia.zhang@linux.alibaba.com>");
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MODULE_DESCRIPTION("SM3 Secure Hash Algorithm, AVX assembler accelerated");
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MODULE_ALIAS_CRYPTO("sm3");
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MODULE_ALIAS_CRYPTO("sm3-avx");
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