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eea9b97b45
No compatible string for it yet, just the version-dependent changes.
They've now tied the hub and the core interrupt lines into a single
interrupt line coming out of the block. It also turns out I made a
mistake in modeling the V3D v3.3 and v4.1 bridge as a part of V3D
itself -- the bridge is going away in favor of an external reset
controller in a larger HW module.
v2: Use consistent checks for whether we're on 4.2, and fix a leak in
an error path.
v3: Use more general means of determining if the current 4.2 changes
are in place, as apparently other platforms may switch back (noted
by Dave). Update the binding doc.
v4: Improve error handling for IRQ init.
Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190308174336.7866-2-eric@anholt.net
Reviewed-by: Dave Emett <david.emett@broadcom.com>
34 lines
1.2 KiB
Plaintext
34 lines
1.2 KiB
Plaintext
Broadcom V3D GPU
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Only the Broadcom V3D 3.x and newer GPUs are covered by this binding.
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For V3D 2.x, see brcm,bcm-vc4.txt.
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Required properties:
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- compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d"
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- reg: Physical base addresses and lengths of the register areas
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- reg-names: Names for the register areas. The "hub" and "core0"
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register areas are always required. The "gca" register area
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is required if the GCA cache controller is present. The
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"bridge" register area is required if an external reset
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controller is not present.
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- interrupts: The interrupt numbers. The first interrupt is for the hub,
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while the following interrupts are separate interrupt lines
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for the cores (if they don't share the hub's interrupt).
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See bindings/interrupt-controller/interrupts.txt
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Optional properties:
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- clocks: The core clock the unit runs on
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- resets: The reset line for v3d, if not using a mapping of the bridge
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See bindings/reset/reset.txt
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v3d {
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compatible = "brcm,7268-v3d";
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reg = <0xf1204000 0x100>,
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<0xf1200000 0x4000>,
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<0xf1208000 0x4000>,
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<0xf1204100 0x100>;
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reg-names = "bridge", "hub", "core0", "gca";
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interrupts = <0 78 4>,
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<0 77 4>;
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};
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