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2cd1f483b8
logs are available here: http://www.pwsan.com/omap/testlogs/prcm_fixes_b_3.8-rc/20130102120724/ The 3730 Beagle XM here has an intermittent failure mounting SD root, but the suspicion right now is that this is due to a failing SD card, rather than any change introduced by these patches. This second version includes a few changes requested by Tony Lindgren. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJQ5IkPAAoJEMePsQ0LvSpL/RQQAJUbGPZTdMEH2DHHDVPRxgBE bWEg0RQfzheOLfFvfot2tReJoN7GMlhzcDq2DSHZLwp5b9XgOgOJdNdldvrvFljD p3QEy+y/7ZSgsAdgDV33vAAUAv4c0CIh0cKgw3JwOn/dqVSbiMXXqXe1kZe419gi bbJHBr6fZH63qvGzkjI17vl3lDq6RsX7vgtEQ9TeiTMUAOnrXzp3rt9oDNVsChSs Ml6h1WKnxQdMFjbNNmBOUGltSg7O1rwuWeS/9mg77yV3lIZ5QdmAVlcq6lUB+jqy CWhAYbrhXMBPYFaxzw0I8h00m0VNBSOZf2e1d5Lw8wU8dVxQ3PVZCI4SyRssBdd3 T+91zy4Axmo+SWrkTxpq+yE2Sn1AMZC4mJwI62UhCZV8TPPvek8IlK3ktKeV97ql BNehuGYqbc3u5TiIjO8K+akTBKKTVDdXaah9ms8rtQ4hcwLwC0VA/71R9qaQJx3E mGf3pRK6FSV83vEMrGb2mRk3ByGHzpYlMD0sb4+0OFvkj5Hyv7OCPb0TJapn6OPO vpeG6pIbHN3p/mKrj/RNHVtvpV5/mHJmMOXgkcXLcdlZhsnGE21dqw/vPrvjf3Wa SnUp7q48/4a2FP2d0KpQ+CpHyLyNEs4x4zs9hfjHGsYs1fWBwdu0+/8rVPaAEjjB iUa8sxlv/1o0rJfiyRkd =oUTN -----END PGP SIGNATURE----- Merge tag 'omap-fixes-a2-for-v3.8-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.8-rc2/fixes Some OMAP PRCM and sparse fixes against v3.8-rc1. A basic set of test logs are available here: http://www.pwsan.com/omap/testlogs/prcm_fixes_b_3.8-rc/20130102120724/ The 3730 Beagle XM here has an intermittent failure mounting SD root, but the suspicion right now is that this is due to a failing SD card, rather than any change introduced by these patches. This second version includes a few changes requested by Tony Lindgren.
220 lines
5.6 KiB
C
220 lines
5.6 KiB
C
/*
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* OMAP2xxx PRM module functions
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*
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* Copyright (C) 2010-2012 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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* Benoît Cousson
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* Paul Walmsley
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* Rajendra Nayak <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include "soc.h"
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#include "common.h"
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#include "vp.h"
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#include "powerdomain.h"
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#include "clockdomain.h"
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#include "prm2xxx.h"
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#include "cm2xxx_3xxx.h"
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#include "prm-regbits-24xx.h"
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/*
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* OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
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* these are reversed from the bits used on OMAP3+
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*/
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#define OMAP24XX_PWRDM_POWER_ON 0x0
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#define OMAP24XX_PWRDM_POWER_RET 0x1
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#define OMAP24XX_PWRDM_POWER_OFF 0x3
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/*
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* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
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* hardware register (which are specific to the OMAP2xxx SoCs) to
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* reset source ID bit shifts (which is an OMAP SoC-independent
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* enumeration)
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*/
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static struct prm_reset_src_map omap2xxx_prm_reset_src_map[] = {
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{ OMAP_GLOBALCOLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
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{ OMAP_GLOBALWARM_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
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{ OMAP24XX_SECU_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
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{ OMAP24XX_MPU_WD_RST_SHIFT, OMAP_MPU_WD_RST_SRC_ID_SHIFT },
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{ OMAP24XX_SECU_WD_RST_SHIFT, OMAP_SECU_WD_RST_SRC_ID_SHIFT },
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{ OMAP24XX_EXTWMPU_RST_SHIFT, OMAP_EXTWARM_RST_SRC_ID_SHIFT },
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{ -1, -1 },
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};
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/**
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* omap2xxx_prm_read_reset_sources - return the last SoC reset source
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*
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* Return a u32 representing the last reset sources of the SoC. The
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* returned reset source bits are standardized across OMAP SoCs.
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*/
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static u32 omap2xxx_prm_read_reset_sources(void)
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{
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struct prm_reset_src_map *p;
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u32 r = 0;
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u32 v;
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v = omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST);
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p = omap2xxx_prm_reset_src_map;
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while (p->reg_shift >= 0 && p->std_shift >= 0) {
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if (v & (1 << p->reg_shift))
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r |= 1 << p->std_shift;
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p++;
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}
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return r;
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}
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/**
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* omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
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* @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
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*
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* Return the common power state bits corresponding to the OMAP2xxx
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* hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
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*/
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static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
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{
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u8 pwrst;
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switch (omap2xxx_pwrst) {
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case OMAP24XX_PWRDM_POWER_OFF:
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pwrst = PWRDM_POWER_OFF;
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break;
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case OMAP24XX_PWRDM_POWER_RET:
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pwrst = PWRDM_POWER_RET;
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break;
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case OMAP24XX_PWRDM_POWER_ON:
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pwrst = PWRDM_POWER_ON;
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break;
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default:
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return -EINVAL;
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}
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return pwrst;
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}
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/**
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* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
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*
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* Set the DPLL reset bit, which should reboot the SoC. This is the
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* recommended way to restart the SoC. No return value.
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*/
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void omap2xxx_prm_dpll_reset(void)
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{
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omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
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OMAP2_RM_RSTCTRL);
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/* OCP barrier */
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omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
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}
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int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
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{
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omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
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clkdm->pwrdm.ptr->prcm_offs,
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OMAP2_PM_PWSTCTRL);
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return 0;
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}
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int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
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{
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omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
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clkdm->pwrdm.ptr->prcm_offs,
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OMAP2_PM_PWSTCTRL);
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return 0;
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}
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static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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u8 omap24xx_pwrst;
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switch (pwrst) {
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case PWRDM_POWER_OFF:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
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break;
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case PWRDM_POWER_RET:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
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break;
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case PWRDM_POWER_ON:
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omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
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break;
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default:
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return -EINVAL;
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}
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omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
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(omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
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return 0;
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}
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static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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u8 omap2xxx_pwrst;
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omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTCTRL,
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OMAP_POWERSTATE_MASK);
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return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
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}
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static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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u8 omap2xxx_pwrst;
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omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
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OMAP2_PM_PWSTST,
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OMAP_POWERSTATEST_MASK);
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return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
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}
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struct pwrdm_ops omap2_pwrdm_operations = {
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.pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
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.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
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.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
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.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
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.pwrdm_read_mem_pwrst = omap2_pwrdm_read_mem_pwrst,
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.pwrdm_read_mem_retst = omap2_pwrdm_read_mem_retst,
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.pwrdm_wait_transition = omap2_pwrdm_wait_transition,
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};
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/*
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*
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*/
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static struct prm_ll_data omap2xxx_prm_ll_data = {
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.read_reset_sources = &omap2xxx_prm_read_reset_sources,
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};
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int __init omap2xxx_prm_init(void)
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{
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if (!cpu_is_omap24xx())
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return 0;
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return prm_register(&omap2xxx_prm_ll_data);
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}
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static void __exit omap2xxx_prm_exit(void)
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{
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if (!cpu_is_omap24xx())
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return;
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/* Should never happen */
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WARN(prm_unregister(&omap2xxx_prm_ll_data),
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"%s: prm_ll_data function pointer mismatch\n", __func__);
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}
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__exitcall(omap2xxx_prm_exit);
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