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1aede681ac
linux/arch/arm/mm
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Russell King 1aede681ac ARM: pm: no need to save/restore context ID register 
There is no need to save and restore the context ID register on ARMv6
and ARMv7 with a temporary page table as we write the context ID
register when we switch back to the real page tables for the thread.

Moreover, the temporary page tables do not contain any non-global
mappings, so the context ID value should not be used.  To be safe,
initialize the register to a reserved context ID value.

Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-09-20 23:33:40 +01:00
..
abort-ev4.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev4t.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev5t.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev5tj.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev6.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-ev7.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-lv4t.S ARM: entry: data abort: ensure r5 is preserved by abort functions 2011-07-02 10:56:12 +01:00
abort-macro.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
abort-nommu.S ARM: entry: data abort: tail-call the main data abort handler 2011-07-02 10:56:11 +01:00
alignment.c ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct 2011-08-09 08:42:39 +01:00
cache-fa.S ARM: mm: cache-fa: Use the new processor struct macros 2011-07-07 15:31:05 +01:00
cache-feroceon-l2.c ARM: fix cache-feroceon-l2 after stack based kmap_atomic() 2010-12-19 12:57:16 -05:00
cache-l2x0.c ARM: 6987/1: l2x0: fix disabling function to avoid deadlock 2011-07-06 20:48:08 +01:00
cache-tauros2.c ARM: Add Tauros2 L2 cache controller support 2009-11-27 15:43:21 -05:00
cache-v3.S ARM: mm: cache-v3: Use the new processor struct macros 2011-07-07 15:31:05 +01:00
cache-v4.S ARM: mm: cache-v4: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v4wb.S ARM: mm: cache-v4wb: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v4wt.S ARM: mm: cache-v4wt: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v6.S ARM: mm: cache-v6: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-v7.S ARM: mm: cache-v7: Use the new processor struct macros 2011-07-07 15:31:06 +01:00
cache-xsc3l2.c ARM: fix cache-xsc3l2 after stack based kmap_atomic() 2010-12-19 12:57:08 -05:00
context.c Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks" 2011-06-09 10:13:16 +01:00
copypage-fa.c ARM: Gemini: fix compiler error in copypage-fa.c 2010-04-27 12:45:10 +02:00
copypage-feroceon.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v3.c ARM: Pass VMA to copy_user_highpage() implementations 2009-10-05 15:17:45 +01:00
copypage-v4mc.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
copypage-v4wb.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v4wt.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v6.c ARM: 6995/2: mm: remove unnecessary cache flush on v6 copypage 2011-07-08 19:46:37 +01:00
copypage-xsc3.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-xscale.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
dma-mapping.c ARM: dma: replace ISA_DMA_THRESHOLD with a variable 2011-07-12 11:08:12 +01:00
extable.c
fault-armv.c ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
fault.c Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm 2011-07-24 10:20:54 -07:00
fault.h
flush.c Merge branches 'consolidate', 'ep93xx', 'fixes', 'misc', 'mmci', 'remove' and 'spear' into for-linus 2011-05-23 19:27:40 +01:00
highmem.c ARM: get rid of kmap_high_l1_vipt() 2010-12-19 12:56:46 -05:00
idmap.c ARM: pgtable: add pud-level code 2011-02-21 19:24:14 +00:00
init.c ARM: 7010/1: mm: fix invalid loop for poison_init_mem 2011-08-09 08:42:38 +01:00
iomap.c ARM: set vga memory base at run-time 2011-07-12 11:19:29 -05:00
ioremap.c Revert "ARM: relax ioremap prohibition (309caa9) for -final and -stable" 2010-12-24 09:49:52 +00:00
Kconfig Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc 2011-07-26 17:41:04 -07:00
Makefile ARM: v6k: introduce CPU_V6K option 2011-02-02 21:23:26 +00:00
mm.h ARM: dma: replace ISA_DMA_THRESHOLD with a variable 2011-07-12 11:08:12 +01:00
mmap.c ARM: 6877/1: the ADDR_NO_RANDOMIZE personality flag should be honored with mmap() 2011-04-14 09:15:24 +01:00
mmu.c ARM: move memory layout sanity checking before meminfo initialization 2011-07-05 20:27:16 +01:00
nommu.c ARM: move memory layout sanity checking before meminfo initialization 2011-07-05 20:27:16 +01:00
pabort-legacy.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pabort-v6.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pabort-v7.S ARM: entry: prefetch abort: tail-call the main prefetch abort handler 2011-07-02 10:56:10 +01:00
pgd.c Merge branches 'fixes', 'pgt-next' and 'versatile' into devel 2011-03-20 09:32:12 +00:00
proc-arm6_7.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
proc-arm7tdmi.S ARM: mm: proc-arm7tdmi: Use the new processor struct macros 2011-07-07 15:31:08 +01:00
proc-arm9tdmi.S ARM: mm: proc-arm9tdmi: Use the new processor struct macros 2011-07-07 15:31:09 +01:00
proc-arm720.S ARM: mm: proc-arm720: Use the new processor struct macros 2011-07-07 15:31:07 +01:00
proc-arm740.S ARM: mm: proc-arm740: Use the new processor struct macros 2011-07-07 15:31:08 +01:00
proc-arm920.S ARM: pm: only use preallocated page table during resume 2011-09-20 23:33:38 +01:00
proc-arm922.S ARM: mm: proc-arm922: Use the new processor struct macros 2011-07-07 15:31:08 +01:00
proc-arm925.S ARM: mm: proc-arm925: Use the new processor struct macros 2011-07-07 15:31:09 +01:00
proc-arm926.S ARM: pm: only use preallocated page table during resume 2011-09-20 23:33:38 +01:00
proc-arm940.S ARM: mm: proc-arm940: Use the new processor struct macros 2011-07-07 15:31:09 +01:00
proc-arm946.S ARM: 7005/1: freshen up mm/proc-arm946.S 2011-08-09 08:42:38 +01:00
proc-arm1020.S ARM: mm: proc-arm1020: Use the new processor struct macros 2011-07-07 15:31:07 +01:00
proc-arm1020e.S ARM: mm: proc-arm1020e: Use the new processor struct macros 2011-07-07 15:31:07 +01:00
proc-arm1022.S ARM: mm: proc-arm1022: Use the new processor struct macros 2011-07-07 15:31:07 +01:00
proc-arm1026.S ARM: mm: proc-arm1026: Use the new processor struct macros 2011-07-07 15:31:07 +01:00
proc-fa526.S ARM: mm: proc-fa526: Use the new processor struct macros 2011-07-07 15:31:09 +01:00
proc-feroceon.S ARM: mm: proc-feroceon: Use the new processor struct macros 2011-07-07 15:31:10 +01:00
proc-macros.S ARM: Fix build errors caused by adding generic macros 2011-07-21 17:49:54 +01:00
proc-mohawk.S ARM: mm: proc-mohawk: Use the new processor struct macros 2011-07-07 15:31:10 +01:00
proc-sa110.S ARM: mm: proc-sa110: Use the new processor struct macros 2011-07-07 15:31:10 +01:00
proc-sa1100.S ARM: pm: only use preallocated page table during resume 2011-09-20 23:33:38 +01:00
proc-syms.c ARM: add size argument to __cpuc_flush_dcache_page 2009-12-14 14:53:22 +00:00
proc-v6.S ARM: pm: no need to save/restore context ID register 2011-09-20 23:33:40 +01:00
proc-v7.S ARM: pm: no need to save/restore context ID register 2011-09-20 23:33:40 +01:00
proc-xsc3.S ARM: pm: only use preallocated page table during resume 2011-09-20 23:33:38 +01:00
proc-xscale.S ARM: pm: only use preallocated page table during resume 2011-09-20 23:33:38 +01:00
tlb-fa.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
tlb-v3.S ARM: mm: tlb-v3: Use the new processor struct macros 2011-07-07 15:31:11 +01:00
tlb-v4.S ARM: mm: tlb-v4: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v4wb.S ARM: mm: tlb-v4wb: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v4wbi.S ARM: mm: tlb-v4wbi: Use the new processor struct macros 2011-07-07 15:31:12 +01:00
tlb-v6.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
tlb-v7.S Merge branch 'devel-stable' into for-next 2011-07-22 23:09:07 +01:00
vmregion.c ARM: DMA: top-down allocation in DMA coherent region 2011-02-23 17:24:11 +00:00
vmregion.h ARM: DMA coherent allocator: align remapped addresses 2010-07-27 10:43:48 +01:00