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1ae25d626c
This patch introduces a new compatible string: "atmel,sama5d3-rstc" and new reset function for sama5d3 and later chips. As in sama5d3 or later chips, we don't have to shutdown the DDR controller before reset. Shutdown the DDR controller before reset is a workaround to avoid DDR signal driving the bus, but since sama5d3 and later chips there is no such a conflict. So in this patch: 1. the sama5d3 reset function only need to write the rstc register and return. 2. we can remove the code related with sama5d3 DDR controller as we don't use it at all. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Sebastian Reichel <sre@kernel.org>
158 lines
4.7 KiB
Plaintext
158 lines
4.7 KiB
Plaintext
Atmel AT91 device tree bindings.
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Boards with a SoC of the Atmel AT91 or SMART family shall have the following
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properties:
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Required root node properties:
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compatible: must be one of:
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* "atmel,at91rm9200"
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* "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
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the specific SoC family or compatible:
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o "atmel,at91sam9260"
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o "atmel,at91sam9261"
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o "atmel,at91sam9263"
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o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
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SoC compatible:
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- "atmel,at91sam9g15"
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- "atmel,at91sam9g25"
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- "atmel,at91sam9g35"
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- "atmel,at91sam9x25"
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- "atmel,at91sam9x35"
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o "atmel,at91sam9g20"
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o "atmel,at91sam9g45"
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o "atmel,at91sam9n12"
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o "atmel,at91sam9rl"
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o "atmel,at91sam9xe"
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* "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
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SoC family:
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o "atmel,sama5d3" shall be extended with the specific SoC compatible:
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- "atmel,sama5d31"
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- "atmel,sama5d33"
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- "atmel,sama5d34"
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- "atmel,sama5d35"
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- "atmel,sama5d36"
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o "atmel,sama5d4" shall be extended with the specific SoC compatible:
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- "atmel,sama5d41"
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- "atmel,sama5d42"
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- "atmel,sama5d43"
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- "atmel,sama5d44"
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the PIT which is the IRQ line
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shared across all System Controller members.
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System Timer (ST) required properties:
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- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the ST which is the IRQ line
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shared across all System Controller members.
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Its subnodes can be:
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- watchdog: compatible should be "atmel,at91rm9200-wdt"
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TC/TCLIB Timer required properties:
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- compatible: Should be "atmel,<chip>-tcb".
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<chip> can be "at91rm9200" or "at91sam9x5"
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- reg: Should contain registers location and length
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- interrupts: Should contain all interrupts for the TC block
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Note that you can specify several interrupt cells if the TC
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block has one interrupt per channel.
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- clock-names: tuple listing input clock names.
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Required elements: "t0_clk"
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Optional elements: "t1_clk", "t2_clk"
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- clocks: phandles to input clocks.
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Examples:
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One interrupt per TC block:
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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interrupts = <18 4>;
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clocks = <&tcb0_clk>;
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clock-names = "t0_clk";
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};
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One interrupt per TC channel in a TC block:
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4 27 4 28 4>;
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clocks = <&tcb1_clk>;
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clock-names = "t0_clk";
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};
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
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- reg: Should contain registers location and length
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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RAMC SDRAM/DDR Controller required properties:
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- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
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"atmel,at91sam9260-sdramc",
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"atmel,at91sam9g45-ddramc",
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"atmel,sama5d3-ddramc",
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- reg: Should contain registers location and length
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Examples:
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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SHDWC Shutdown Controller
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required properties:
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- compatible: Should be "atmel,<chip>-shdwc".
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<chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
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- reg: Should contain registers location and length
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optional properties:
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- atmel,wakeup-mode: String, operation mode of the wakeup mode.
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Supported values are: "none", "high", "low", "any".
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- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
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optional at91sam9260 properties:
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9rl properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9x5 properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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Special Function Registers (SFR)
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Special Function Registers (SFR) manage specific aspects of the integrated
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memory, bridge implementations, processor and other functionality not controlled
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elsewhere.
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required properties:
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- compatible: Should be "atmel,<chip>-sfr", "syscon".
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<chip> can be "sama5d3" or "sama5d4".
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- reg: Should contain registers location and length
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sfr@f0038000 {
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compatible = "atmel,sama5d3-sfr", "syscon";
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reg = <0xf0038000 0x60>;
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};
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