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The kbuild documentation clearly shows that the documents there are written at different times: some use markdown, some use their own peculiar logic to split sections. Convert everything to ReST without affecting too much the author's style and avoiding adding uneeded markups. The conversion is actually: - add blank lines and identation in order to identify paragraphs; - fix tables markups; - add some lists markups; - mark literal blocks; - adjust title markups. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
248 lines
8.1 KiB
ReStructuredText
248 lines
8.1 KiB
ReStructuredText
======================
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Kconfig macro language
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======================
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Concept
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-------
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The basic idea was inspired by Make. When we look at Make, we notice sort of
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two languages in one. One language describes dependency graphs consisting of
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targets and prerequisites. The other is a macro language for performing textual
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substitution.
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There is clear distinction between the two language stages. For example, you
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can write a makefile like follows::
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APP := foo
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SRC := foo.c
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CC := gcc
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$(APP): $(SRC)
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$(CC) -o $(APP) $(SRC)
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The macro language replaces the variable references with their expanded form,
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and handles as if the source file were input like follows::
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foo: foo.c
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gcc -o foo foo.c
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Then, Make analyzes the dependency graph and determines the targets to be
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updated.
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The idea is quite similar in Kconfig - it is possible to describe a Kconfig
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file like this::
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CC := gcc
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config CC_HAS_FOO
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def_bool $(shell, $(srctree)/scripts/gcc-check-foo.sh $(CC))
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The macro language in Kconfig processes the source file into the following
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intermediate::
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config CC_HAS_FOO
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def_bool y
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Then, Kconfig moves onto the evaluation stage to resolve inter-symbol
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dependency as explained in kconfig-language.txt.
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Variables
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---------
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Like in Make, a variable in Kconfig works as a macro variable. A macro
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variable is expanded "in place" to yield a text string that may then be
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expanded further. To get the value of a variable, enclose the variable name in
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$( ). The parentheses are required even for single-letter variable names; $X is
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a syntax error. The curly brace form as in ${CC} is not supported either.
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There are two types of variables: simply expanded variables and recursively
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expanded variables.
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A simply expanded variable is defined using the := assignment operator. Its
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righthand side is expanded immediately upon reading the line from the Kconfig
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file.
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A recursively expanded variable is defined using the = assignment operator.
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Its righthand side is simply stored as the value of the variable without
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expanding it in any way. Instead, the expansion is performed when the variable
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is used.
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There is another type of assignment operator; += is used to append text to a
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variable. The righthand side of += is expanded immediately if the lefthand
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side was originally defined as a simple variable. Otherwise, its evaluation is
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deferred.
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The variable reference can take parameters, in the following form::
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$(name,arg1,arg2,arg3)
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You can consider the parameterized reference as a function. (more precisely,
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"user-defined function" in contrast to "built-in function" listed below).
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Useful functions must be expanded when they are used since the same function is
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expanded differently if different parameters are passed. Hence, a user-defined
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function is defined using the = assignment operator. The parameters are
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referenced within the body definition with $(1), $(2), etc.
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In fact, recursively expanded variables and user-defined functions are the same
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internally. (In other words, "variable" is "function with zero argument".)
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When we say "variable" in a broad sense, it includes "user-defined function".
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Built-in functions
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------------------
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Like Make, Kconfig provides several built-in functions. Every function takes a
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particular number of arguments.
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In Make, every built-in function takes at least one argument. Kconfig allows
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zero argument for built-in functions, such as $(fileno), $(lineno). You could
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consider those as "built-in variable", but it is just a matter of how we call
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it after all. Let's say "built-in function" here to refer to natively supported
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functionality.
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Kconfig currently supports the following built-in functions.
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- $(shell,command)
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The "shell" function accepts a single argument that is expanded and passed
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to a subshell for execution. The standard output of the command is then read
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and returned as the value of the function. Every newline in the output is
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replaced with a space. Any trailing newlines are deleted. The standard error
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is not returned, nor is any program exit status.
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- $(info,text)
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The "info" function takes a single argument and prints it to stdout.
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It evaluates to an empty string.
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- $(warning-if,condition,text)
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The "warning-if" function takes two arguments. If the condition part is "y",
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the text part is sent to stderr. The text is prefixed with the name of the
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current Kconfig file and the current line number.
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- $(error-if,condition,text)
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The "error-if" function is similar to "warning-if", but it terminates the
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parsing immediately if the condition part is "y".
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- $(filename)
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The 'filename' takes no argument, and $(filename) is expanded to the file
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name being parsed.
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- $(lineno)
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The 'lineno' takes no argument, and $(lineno) is expanded to the line number
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being parsed.
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Make vs Kconfig
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---------------
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Kconfig adopts Make-like macro language, but the function call syntax is
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slightly different.
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A function call in Make looks like this::
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$(func-name arg1,arg2,arg3)
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The function name and the first argument are separated by at least one
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whitespace. Then, leading whitespaces are trimmed from the first argument,
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while whitespaces in the other arguments are kept. You need to use a kind of
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trick to start the first parameter with spaces. For example, if you want
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to make "info" function print " hello", you can write like follows::
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empty :=
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space := $(empty) $(empty)
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$(info $(space)$(space)hello)
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Kconfig uses only commas for delimiters, and keeps all whitespaces in the
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function call. Some people prefer putting a space after each comma delimiter::
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$(func-name, arg1, arg2, arg3)
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In this case, "func-name" will receive " arg1", " arg2", " arg3". The presence
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of leading spaces may matter depending on the function. The same applies to
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Make - for example, $(subst .c, .o, $(sources)) is a typical mistake; it
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replaces ".c" with " .o".
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In Make, a user-defined function is referenced by using a built-in function,
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'call', like this::
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$(call my-func,arg1,arg2,arg3)
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Kconfig invokes user-defined functions and built-in functions in the same way.
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The omission of 'call' makes the syntax shorter.
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In Make, some functions treat commas verbatim instead of argument separators.
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For example, $(shell echo hello, world) runs the command "echo hello, world".
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Likewise, $(info hello, world) prints "hello, world" to stdout. You could say
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this is _useful_ inconsistency.
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In Kconfig, for simpler implementation and grammatical consistency, commas that
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appear in the $( ) context are always delimiters. It means::
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$(shell, echo hello, world)
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is an error because it is passing two parameters where the 'shell' function
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accepts only one. To pass commas in arguments, you can use the following trick::
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comma := ,
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$(shell, echo hello$(comma) world)
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Caveats
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-------
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A variable (or function) cannot be expanded across tokens. So, you cannot use
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a variable as a shorthand for an expression that consists of multiple tokens.
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The following works::
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RANGE_MIN := 1
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RANGE_MAX := 3
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config FOO
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int "foo"
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range $(RANGE_MIN) $(RANGE_MAX)
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But, the following does not work::
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RANGES := 1 3
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config FOO
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int "foo"
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range $(RANGES)
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A variable cannot be expanded to any keyword in Kconfig. The following does
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not work::
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MY_TYPE := tristate
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config FOO
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$(MY_TYPE) "foo"
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default y
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Obviously from the design, $(shell command) is expanded in the textual
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substitution phase. You cannot pass symbols to the 'shell' function.
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The following does not work as expected::
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config ENDIAN_FLAG
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string
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default "-mbig-endian" if CPU_BIG_ENDIAN
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default "-mlittle-endian" if CPU_LITTLE_ENDIAN
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config CC_HAS_ENDIAN_FLAG
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def_bool $(shell $(srctree)/scripts/gcc-check-flag ENDIAN_FLAG)
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Instead, you can do like follows so that any function call is statically
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expanded::
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config CC_HAS_ENDIAN_FLAG
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bool
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default $(shell $(srctree)/scripts/gcc-check-flag -mbig-endian) if CPU_BIG_ENDIAN
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default $(shell $(srctree)/scripts/gcc-check-flag -mlittle-endian) if CPU_LITTLE_ENDIAN
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