Arnd Bergmann d8ece8b832 RISC-V Devicetrees for v6.5 Part 2 ... T-Head: Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head 1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a, for which a minimal dts is added. Misc: Re-sort the dts Makefile to be in alphanumerical order by directory. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZJDOAwAKCRB4tDGHoIJi 0gAoAQCqGDPqdw5MdT/+tTJqkAIVFo3KyxSrMHvv3TE36Xp1HgEAxJQ+NoZ30nhx pbaJaRcZDw7PKOVmMJ92R564EMdjngA= =hJMo -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmSSFO4ACgkQYKtH/8kJ UiekuA//UW0YV5dUVykYY7EAB9ERnRfnD8S9SaaRQ+rvlZLLfceqcsGqHeB1f5nA cb4mRcS47PgTZLBpS7ZaURXFaQtJMEqFKwC/y7cjsssuXq+Vr2jf3apEL2F8IVA3 EQGTBPA9AA2+L+hSnVNCqjJP86H8y4+RuWiADUTHG9tmPrMMwHaUdL/og7Bk4zps jmBfZ6oD7upRS9+elwIInB+YH4dEnbty4VgVjJzL2PtGIS2V0zkSG+lmCv4JJmz8 esD4PT+4nnMBCh5LrGNxTJgn9zQyMHZ/pr1mK5n0hE+SLeZZj7DnEWKkchOJPdlk Hu31+dJMjcTdvJAATIqeiuUPJhhpRyLf+PenXUX48uc/nu5GZWFj/TL/fdSHoYG1 D0B1SNcJOtWm5Iy7fukMoV8e6Pz8EePTh7m/AtUaudCCDFwh/ju1TnbIzqs9DPtc iHYfFti7qVVQFL6YJnjpHHIK7UKJi4MguyDfKdl8RsRzT1Yhrx1aw0WqSYiY+a/z sdAzA85yZpU7TPmCw1DThE6uNp3YC5XqKmexwcZx3+cmpCF7HKxCieTqyVgsUkwg 9BxsQmReP1bego4oK7dGE914i0lkaGH/wDVlL0PPGPoCL8g9ZIfBGukN8sG62m9O sGPs2j4do28BK11Ow0OoRvVTbnoqZg0iGFJbk6DuWXtK881PfUc= =U5qO -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.5 Part 2 T-Head: Add a basic dtsi, Kconfig bits & trivial binding additions for the T-Head 1520 SoC (codename "light"). This SoC can be found on the Lichee Pi 4a, for which a minimal dts is added. Misc: Re-sort the dts Makefile to be in alphanumerical order by directory. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.5-pt2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: sort makefile entries by directory riscv: defconfig: enable T-HEAD SoC MAINTAINERS: add entry for T-HEAD RISC-V SoC riscv: dts: thead: add sipeed Lichee Pi 4A board device tree riscv: dts: add initial T-HEAD TH1520 SoC device tree riscv: Add the T-HEAD SoC family Kconfig option dt-bindings: riscv: Add T-HEAD TH1520 board compatibles dt-bindings: timer: Add T-HEAD TH1520 clint dt-bindings: interrupt-controller: Add T-HEAD's TH1520 PLIC Link: https://lore.kernel.org/r/20230620-fidelity-variety-60b47c889e31@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de>		2023-06-20 23:06:54 +02:00
..
dts	RISC-V Devicetrees for v6.5 Part 2	2023-06-20 23:06:54 +02:00
.gitignore	riscv: efi: enable generic EFI compressed boot	2022-09-20 09:50:30 +02:00
install.sh	kbuild: factor out the common installation code into scripts/install.sh	2022-05-11 21:45:53 +09:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
Makefile	riscv: Use --emit-relocs in order to move .rela.dyn in init	2023-04-19 07:46:33 -07:00