Marc Zyngier 1a2fb94e6a arm/arm64: KVM: Consolidate the PSCI include files ... As we're about to update the PSCI support, and because I'm lazy, let's move the PSCI include file to include/kvm so that both ARM architectures can find it. Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>		2018-02-06 22:53:54 +00:00
..
hyp	KVM: arm64: Handle RAS SErrors from EL2 on guest exit	2018-01-16 15:09:36 +00:00
debug.c	KVM: arm/arm64: debug: Introduce helper for single-step	2017-11-29 16:46:19 +01:00
guest.c	KVM: arm/arm64: Allow setting the timer IRQ numbers from userspace	2017-06-08 16:59:57 +02:00
handle_exit.c	arm/arm64: KVM: Consolidate the PSCI include files	2018-02-06 22:53:54 +00:00
hyp-init.S	arm64: assembler: Change order of macro arguments in phys_to_ttbr	2018-02-06 22:53:21 +00:00
hyp.S	arm64: hyp-stub/KVM: Kill __hyp_get_vectors	2017-04-09 07:49:34 -07:00
inject_fault.c	KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.	2018-01-16 15:08:41 +00:00
irq.h	KVM: arm/arm64: Enable irqchip routing	2016-07-22 18:52:01 +01:00
Kconfig	GICv4 Support for KVM/ARM for v4.15	2017-11-17 13:20:01 +01:00
Makefile	GICv4 Support for KVM/ARM for v4.15	2017-11-17 13:20:01 +01:00
regmap.c	arm64: KVM: 32bit GP register access	2013-06-12 16:42:14 +01:00
reset.c	KVM: arm/arm64: Move timer IRQ default init to arch_timer.c	2017-06-08 16:59:56 +02:00
sys_regs_generic_v8.c	KVM: arm64: Use common sysreg definitions	2017-03-22 18:38:26 +00:00
sys_regs.c	KVM: arm64: Emulate RAS error registers and set HCR_EL2's TERR & TEA	2018-01-16 15:09:47 +00:00
sys_regs.h	Merge remote-tracking branch 'rutland/kvm/common-sysreg' into next-fix	2017-04-09 07:50:34 -07:00
trace.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
vgic-sys-reg-v3.c	KVM: arm/arm64: Extract GICv3 max APRn index calculation	2017-09-05 17:33:39 +02:00