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New GMAC devices (newer than the databook 3.50a) have the HW capability register that provides which features are actually supported by the hardware. On old devices many information have to be passed through the platform, for example: enhanced descriptor structure, TX COE etc. These are mandatory to properly configure the driver. This remains still valid because the driver has to support old Synopsys devices but now it's also able to override them using the values from the HW capability register if supported. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
90 lines
2.6 KiB
C
90 lines
2.6 KiB
C
/*******************************************************************************
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Copyright (C) 2007-2009 STMicroelectronics Ltd
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#define DRV_MODULE_VERSION "Oct_2011"
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#include <linux/stmmac.h>
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#include <linux/phy.h>
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#include "common.h"
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#ifdef CONFIG_STMMAC_TIMER
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#include "stmmac_timer.h"
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#endif
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struct stmmac_priv {
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/* Frequently used values are kept adjacent for cache effect */
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struct dma_desc *dma_tx ____cacheline_aligned;
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dma_addr_t dma_tx_phy;
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struct sk_buff **tx_skbuff;
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unsigned int cur_tx;
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unsigned int dirty_tx;
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unsigned int dma_tx_size;
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int tx_coalesce;
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struct dma_desc *dma_rx ;
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unsigned int cur_rx;
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unsigned int dirty_rx;
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struct sk_buff **rx_skbuff;
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dma_addr_t *rx_skbuff_dma;
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struct sk_buff_head rx_recycle;
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struct net_device *dev;
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dma_addr_t dma_rx_phy;
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unsigned int dma_rx_size;
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unsigned int dma_buf_sz;
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struct device *device;
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struct mac_device_info *hw;
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void __iomem *ioaddr;
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struct stmmac_extra_stats xstats;
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struct napi_struct napi;
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int rx_coe;
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int no_csum_insertion;
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struct phy_device *phydev;
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int oldlink;
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int speed;
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int oldduplex;
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unsigned int flow_ctrl;
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unsigned int pause;
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struct mii_bus *mii;
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int mii_irq[PHY_MAX_ADDR];
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u32 msg_enable;
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spinlock_t lock;
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spinlock_t tx_lock;
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int wolopts;
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int wol_irq;
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#ifdef CONFIG_STMMAC_TIMER
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struct stmmac_timer *tm;
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#endif
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struct plat_stmmacenet_data *plat;
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struct stmmac_counters mmc;
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struct dma_features dma_cap;
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int hw_cap_support;
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};
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extern int stmmac_mdio_unregister(struct net_device *ndev);
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extern int stmmac_mdio_register(struct net_device *ndev);
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extern void stmmac_set_ethtool_ops(struct net_device *netdev);
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extern const struct stmmac_desc_ops enh_desc_ops;
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extern const struct stmmac_desc_ops ndesc_ops;
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