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19df0c2fef
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
262 lines
5.3 KiB
ArmAsm
262 lines
5.3 KiB
ArmAsm
#ifdef CONFIG_PPC64
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#define PROVIDE32(x) PROVIDE(__unused__##x)
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#else
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#define PROVIDE32(x) PROVIDE(x)
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#endif
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#include <asm/page.h>
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#include <asm-generic/vmlinux.lds.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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ENTRY(_stext)
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PHDRS {
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kernel PT_LOAD FLAGS(7); /* RWX */
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notes PT_NOTE FLAGS(0);
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dummy PT_NOTE FLAGS(0);
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/* binutils < 2.18 has a bug that makes it misbehave when taking an
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ELF file with all segments at load address 0 as input. This
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happens when running "strip" on vmlinux, because of the AT() magic
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in this linker script. People using GCC >= 4.2 won't run into
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this problem, because the "build-id" support will put some data
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into the "notes" segment (at a non-zero load address).
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To work around this, we force some data into both the "dummy"
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segment and the kernel segment, so the dummy segment will get a
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non-zero load address. It's not enough to always create the
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"notes" segment, since if nothing gets assigned to it, its load
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address will be zero. */
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}
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#ifdef CONFIG_PPC64
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OUTPUT_ARCH(powerpc:common64)
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jiffies = jiffies_64;
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#else
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OUTPUT_ARCH(powerpc:common)
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jiffies = jiffies_64 + 4;
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#endif
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SECTIONS
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{
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. = 0;
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reloc_start = .;
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. = KERNELBASE;
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/*
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* Text, read only data and other permanent read-only sections
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*/
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/* Text and gots */
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.text : AT(ADDR(.text) - LOAD_OFFSET) {
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ALIGN_FUNCTION();
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HEAD_TEXT
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_text = .;
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/* careful! __ftr_alt_* sections need to be close to .text */
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*(.text .fixup __ftr_alt_* .ref.text)
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SCHED_TEXT
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LOCK_TEXT
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KPROBES_TEXT
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IRQENTRY_TEXT
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#ifdef CONFIG_PPC32
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*(.got1)
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__got2_start = .;
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*(.got2)
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__got2_end = .;
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#endif /* CONFIG_PPC32 */
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} :kernel
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. = ALIGN(PAGE_SIZE);
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_etext = .;
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PROVIDE32 (etext = .);
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/* Read-only data */
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RODATA
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EXCEPTION_TABLE(0)
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NOTES :kernel :notes
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/* The dummy segment contents for the bug workaround mentioned above
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near PHDRS. */
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.dummy : AT(ADDR(.dummy) - LOAD_OFFSET) {
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LONG(0)
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LONG(0)
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LONG(0)
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} :kernel :dummy
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/*
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* Init sections discarded at runtime
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*/
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. = ALIGN(PAGE_SIZE);
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__init_begin = .;
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INIT_TEXT_SECTION(PAGE_SIZE) :kernel
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/* .exit.text is discarded at runtime, not link time,
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* to deal with references from __bug_table
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*/
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.exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
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EXIT_TEXT
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}
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.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
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INIT_DATA
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__vtop_table_begin = .;
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*(.vtop_fixup);
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__vtop_table_end = .;
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__ptov_table_begin = .;
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*(.ptov_fixup);
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__ptov_table_end = .;
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#ifdef CONFIG_PPC_ISERIES
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__dt_strings_start = .;
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*(.dt_strings);
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__dt_strings_end = .;
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#endif
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}
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.init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
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INIT_SETUP(16)
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}
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.initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
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INIT_CALLS
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}
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.con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
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CON_INITCALL
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}
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SECURITY_INIT
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. = ALIGN(8);
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__ftr_fixup : AT(ADDR(__ftr_fixup) - LOAD_OFFSET) {
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__start___ftr_fixup = .;
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*(__ftr_fixup)
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__stop___ftr_fixup = .;
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}
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. = ALIGN(8);
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__mmu_ftr_fixup : AT(ADDR(__mmu_ftr_fixup) - LOAD_OFFSET) {
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__start___mmu_ftr_fixup = .;
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*(__mmu_ftr_fixup)
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__stop___mmu_ftr_fixup = .;
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}
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. = ALIGN(8);
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__lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
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__start___lwsync_fixup = .;
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*(__lwsync_fixup)
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__stop___lwsync_fixup = .;
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}
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#ifdef CONFIG_PPC64
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. = ALIGN(8);
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__fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
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__start___fw_ftr_fixup = .;
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*(__fw_ftr_fixup)
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__stop___fw_ftr_fixup = .;
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}
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#endif
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.init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
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INIT_RAM_FS
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}
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PERCPU(L1_CACHE_BYTES, PAGE_SIZE)
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. = ALIGN(8);
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.machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
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__machine_desc_start = . ;
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*(.machine.desc)
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__machine_desc_end = . ;
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}
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#ifdef CONFIG_RELOCATABLE
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. = ALIGN(8);
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.dynsym : AT(ADDR(.dynsym) - LOAD_OFFSET) { *(.dynsym) }
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.dynstr : AT(ADDR(.dynstr) - LOAD_OFFSET) { *(.dynstr) }
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.dynamic : AT(ADDR(.dynamic) - LOAD_OFFSET)
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{
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__dynamic_start = .;
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*(.dynamic)
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}
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.hash : AT(ADDR(.hash) - LOAD_OFFSET) { *(.hash) }
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.interp : AT(ADDR(.interp) - LOAD_OFFSET) { *(.interp) }
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.rela.dyn : AT(ADDR(.rela.dyn) - LOAD_OFFSET)
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{
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__rela_dyn_start = .;
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*(.rela*)
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}
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#endif
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/* freed after init ends here */
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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/*
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* And now the various read/write data
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*/
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. = ALIGN(PAGE_SIZE);
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_sdata = .;
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#ifdef CONFIG_PPC32
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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DATA_DATA
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*(.sdata)
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*(.got.plt) *(.got)
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}
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#else
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.data : AT(ADDR(.data) - LOAD_OFFSET) {
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DATA_DATA
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*(.data.rel*)
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*(.toc1)
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*(.branch_lt)
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}
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.opd : AT(ADDR(.opd) - LOAD_OFFSET) {
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*(.opd)
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}
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.got : AT(ADDR(.got) - LOAD_OFFSET) {
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__toc_start = .;
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*(.got)
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*(.toc)
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}
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#endif
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/* The initial task and kernel stack */
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INIT_TASK_DATA_SECTION(THREAD_SIZE)
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.data..page_aligned : AT(ADDR(.data..page_aligned) - LOAD_OFFSET) {
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PAGE_ALIGNED_DATA(PAGE_SIZE)
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}
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.data..cacheline_aligned : AT(ADDR(.data..cacheline_aligned) - LOAD_OFFSET) {
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CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
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}
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.data..read_mostly : AT(ADDR(.data..read_mostly) - LOAD_OFFSET) {
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READ_MOSTLY_DATA(L1_CACHE_BYTES)
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}
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. = ALIGN(PAGE_SIZE);
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.data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
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NOSAVE_DATA
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}
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. = ALIGN(PAGE_SIZE);
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_edata = .;
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PROVIDE32 (edata = .);
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/*
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* And finally the bss
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*/
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BSS_SECTION(0, 0, 0)
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. = ALIGN(PAGE_SIZE);
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_end = . ;
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PROVIDE32 (end = .);
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/* Sections to be discarded. */
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DISCARDS
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}
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