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b8da46d3d5
The cnt32_to_63 algorithm relies on proper counter data evaluation ordering to work properly. This was missing from the provided documentation. Let's augment the documentation with the missing usage constraint and fix the only instance that got it wrong. Signed-off-by: Nicolas Pitre <nico@fluxnic.net> Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
211 lines
5.1 KiB
C
211 lines
5.1 KiB
C
/* MN10300 Low level time management
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*
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* Copyright (C) 2007-2008 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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* - Derived from arch/i386/kernel/time.c
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/profile.h>
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#include <linux/cnt32_to_63.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <asm/irq.h>
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#include <asm/div64.h>
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#include <asm/processor.h>
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#include <asm/intctl-regs.h>
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#include <asm/rtc.h>
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#include "internal.h"
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static unsigned long mn10300_last_tsc; /* time-stamp counter at last time
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* interrupt occurred */
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static unsigned long sched_clock_multiplier;
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/*
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* scheduler clock - returns current time in nanosec units.
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*/
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unsigned long long sched_clock(void)
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{
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union {
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unsigned long long ll;
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unsigned l[2];
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} tsc64, result;
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unsigned long tmp;
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unsigned product[3]; /* 96-bit intermediate value */
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/* cnt32_to_63() is not safe with preemption */
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preempt_disable();
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/* expand the tsc to 64-bits.
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* - sched_clock() must be called once a minute or better or the
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* following will go horribly wrong - see cnt32_to_63()
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*/
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tsc64.ll = cnt32_to_63(get_cycles()) & 0x7fffffffffffffffULL;
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preempt_enable();
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/* scale the 64-bit TSC value to a nanosecond value via a 96-bit
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* intermediate
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*/
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asm("mulu %2,%0,%3,%0 \n" /* LSW * mult -> 0:%3:%0 */
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"mulu %2,%1,%2,%1 \n" /* MSW * mult -> %2:%1:0 */
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"add %3,%1 \n"
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"addc 0,%2 \n" /* result in %2:%1:%0 */
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: "=r"(product[0]), "=r"(product[1]), "=r"(product[2]), "=r"(tmp)
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: "0"(tsc64.l[0]), "1"(tsc64.l[1]), "2"(sched_clock_multiplier)
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: "cc");
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result.l[0] = product[1] << 16 | product[0] >> 16;
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result.l[1] = product[2] << 16 | product[1] >> 16;
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return result.ll;
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}
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/*
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* initialise the scheduler clock
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*/
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static void __init mn10300_sched_clock_init(void)
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{
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sched_clock_multiplier =
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__muldiv64u(NSEC_PER_SEC, 1 << 16, MN10300_TSCCLK);
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}
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/**
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* local_timer_interrupt - Local timer interrupt handler
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*
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* Handle local timer interrupts for this CPU. They may have been propagated
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* to this CPU from the CPU that actually gets them by way of an IPI.
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*/
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irqreturn_t local_timer_interrupt(void)
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{
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profile_tick(CPU_PROFILING);
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update_process_times(user_mode(get_irq_regs()));
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return IRQ_HANDLED;
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}
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#ifndef CONFIG_GENERIC_TIME
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/*
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* advance the kernel's time keeping clocks (xtime and jiffies)
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* - we use Timer 0 & 1 cascaded as a clock to nudge us the next time
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* there's a need to update
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*/
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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unsigned tsc, elapse;
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irqreturn_t ret;
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write_seqlock(&xtime_lock);
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while (tsc = get_cycles(),
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elapse = tsc - mn10300_last_tsc, /* time elapsed since last
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* tick */
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elapse > MN10300_TSC_PER_HZ
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) {
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mn10300_last_tsc += MN10300_TSC_PER_HZ;
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/* advance the kernel's time tracking system */
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do_timer(1);
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}
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write_sequnlock(&xtime_lock);
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ret = local_timer_interrupt();
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#ifdef CONFIG_SMP
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send_IPI_allbutself(LOCAL_TIMER_IPI);
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#endif
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return ret;
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}
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static struct irqaction timer_irq = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
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.name = "timer",
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};
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#endif /* CONFIG_GENERIC_TIME */
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#ifdef CONFIG_CSRC_MN10300
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void __init clocksource_set_clock(struct clocksource *cs, unsigned int clock)
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{
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u64 temp;
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u32 shift;
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/* Find a shift value */
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for (shift = 32; shift > 0; shift--) {
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temp = (u64) NSEC_PER_SEC << shift;
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do_div(temp, clock);
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if ((temp >> 32) == 0)
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break;
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}
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cs->shift = shift;
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cs->mult = (u32) temp;
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}
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#endif
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#if CONFIG_CEVT_MN10300
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void __cpuinit clockevent_set_clock(struct clock_event_device *cd,
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unsigned int clock)
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{
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u64 temp;
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u32 shift;
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/* Find a shift value */
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for (shift = 32; shift > 0; shift--) {
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temp = (u64) clock << shift;
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do_div(temp, NSEC_PER_SEC);
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if ((temp >> 32) == 0)
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break;
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}
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cd->shift = shift;
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cd->mult = (u32) temp;
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}
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#endif
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/*
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* initialise the various timers used by the main part of the kernel
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*/
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void __init time_init(void)
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{
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/* we need the prescalar running to be able to use IOCLK/8
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* - IOCLK runs at 1/4 (ST5 open) or 1/8 (ST5 closed) internal CPU clock
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* - IOCLK runs at Fosc rate (crystal speed)
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*/
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TMPSCNT |= TMPSCNT_ENABLE;
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#ifdef CONFIG_GENERIC_TIME
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init_clocksource();
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#else
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startup_timestamp_counter();
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#endif
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printk(KERN_INFO
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"timestamp counter I/O clock running at %lu.%02lu"
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" (calibrated against RTC)\n",
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MN10300_TSCCLK / 1000000, (MN10300_TSCCLK / 10000) % 100);
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mn10300_last_tsc = read_timestamp_counter();
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#ifdef CONFIG_GENERIC_CLOCKEVENTS
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init_clockevents();
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#else
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reload_jiffies_counter(MN10300_JC_PER_HZ - 1);
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setup_jiffies_interrupt(TMJCIRQ, &timer_irq, CONFIG_TIMER_IRQ_LEVEL);
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#endif
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#ifdef CONFIG_MN10300_WD_TIMER
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/* start the watchdog timer */
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watchdog_go();
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#endif
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mn10300_sched_clock_init();
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}
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