Bernd Schmidt dbdf20db53 Blackfin arch: Faster C implementation of no-MPU CPLB handler ... This is a mixture ofcMichael McTernan's patch and the existing cplb-mpu code. We ditch the old cplb-nompu implementation, which is a good example of why a good algorithm in a HLL is preferrable to a bad algorithm written in assembly. Rather than try to construct a table of all posible CPLBs and search it, we just create a (smaller) table of memory regions and their attributes. Some of the data structures are now unified for both the mpu and nompu cases. A lot of needless complexity in cplbinit.c is removed. Further optimizations: * compile cplbmgr.c with a lot of -ffixed-reg options, and omit saving these registers on the stack when entering a CPLB exception. * lose cli/nop/nop/sti sequences for some workarounds - these don't * make sense in an exception context Additional code unification should be possible after this. [Mike Frysinger <vapier.adi@gmail.com>: - convert CPP if statements to C if statements - remove redundant statements - use a do...while loop rather than a for loop to get slightly better optimization and to avoid gcc "may be used uninitialized" warnings ... we know that the [id]cplb_nr_bounds variables will never be 0, so this is OK - the no-mpu code was the last user of MAX_MEM_SIZE and with that rewritten, we can punt it - add some BUG_ON() checks to make sure we dont overflow the small cplb_bounds array - add i/d cplb entries for the bootrom because there is functions/data in there we want to access - we do not need a NULL trailing entry as any time we access the bounds arrays, we use the nr_bounds variable ] Signed-off-by: Michael McTernan <mmcternan@airvana.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>		2009-01-07 23:14:38 +08:00
..
blackfin_sram.h	Blackfin arch: change L1 malloc to base on slab cache and lists.	2008-07-19 14:51:31 +08:00
init.c	Blackfin arch: Faster C implementation of no-MPU CPLB handler	2009-01-07 23:14:38 +08:00
isram-driver.c	Blackfin arch: Use DTEST rather than DMA to poke at L1 SRAM during exception context	2008-10-08 18:03:33 +08:00
Makefile	Blackfin arch: Use DTEST rather than DMA to poke at L1 SRAM during exception context	2008-10-08 18:03:33 +08:00
sram-alloc.c	Blackfin arch: smp patch cleanup from LKML review	2009-01-07 23:14:39 +08:00