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This patch adds support for the Intel RAPL energy counter PP1 (Power Plane 1). On client processors, it usually corresponds to the energy consumption of the builtin graphic card. That is why the sysfs event is called energy-gpu. New event: - name: power/energy-gpu/ - code: event=0x4 - unit: 2^-32 Joules On processors without graphics, this should count 0. The patch only enables this event on client processors. Reviewed-by: Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com> Signed-off-by: Stephane Eranian <eranian@google.com> Cc: ak@linux.intel.com Cc: acme@redhat.com Cc: jolsa@redhat.com Cc: zheng.z.yan@intel.com Cc: bp@alien8.de Cc: vincent.weaver@maine.edu Signed-off-by: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1389176153-3128-3-git-send-email-eranian@google.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
680 lines
16 KiB
C
680 lines
16 KiB
C
/*
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* perf_event_intel_rapl.c: support Intel RAPL energy consumption counters
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* Copyright (C) 2013 Google, Inc., Stephane Eranian
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*
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* Intel RAPL interface is specified in the IA-32 Manual Vol3b
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* section 14.7.1 (September 2013)
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*
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* RAPL provides more controls than just reporting energy consumption
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* however here we only expose the 3 energy consumption free running
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* counters (pp0, pkg, dram).
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*
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* Each of those counters increments in a power unit defined by the
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* RAPL_POWER_UNIT MSR. On SandyBridge, this unit is 1/(2^16) Joules
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* but it can vary.
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*
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* Counter to rapl events mappings:
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*
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* pp0 counter: consumption of all physical cores (power plane 0)
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* event: rapl_energy_cores
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* perf code: 0x1
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*
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* pkg counter: consumption of the whole processor package
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* event: rapl_energy_pkg
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* perf code: 0x2
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*
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* dram counter: consumption of the dram domain (servers only)
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* event: rapl_energy_dram
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* perf code: 0x3
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*
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* dram counter: consumption of the builtin-gpu domain (client only)
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* event: rapl_energy_gpu
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* perf code: 0x4
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*
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* We manage those counters as free running (read-only). They may be
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* use simultaneously by other tools, such as turbostat.
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*
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* The events only support system-wide mode counting. There is no
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* sampling support because it does not make sense and is not
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* supported by the RAPL hardware.
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*
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* Because we want to avoid floating-point operations in the kernel,
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* the events are all reported in fixed point arithmetic (32.32).
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* Tools must adjust the counts to convert them to Watts using
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* the duration of the measurement. Tools may use a function such as
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* ldexp(raw_count, -32);
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/perf_event.h>
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#include <asm/cpu_device_id.h>
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#include "perf_event.h"
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/*
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* RAPL energy status counters
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*/
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#define RAPL_IDX_PP0_NRG_STAT 0 /* all cores */
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#define INTEL_RAPL_PP0 0x1 /* pseudo-encoding */
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#define RAPL_IDX_PKG_NRG_STAT 1 /* entire package */
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#define INTEL_RAPL_PKG 0x2 /* pseudo-encoding */
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#define RAPL_IDX_RAM_NRG_STAT 2 /* DRAM */
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#define INTEL_RAPL_RAM 0x3 /* pseudo-encoding */
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#define RAPL_IDX_PP1_NRG_STAT 3 /* DRAM */
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#define INTEL_RAPL_PP1 0x4 /* pseudo-encoding */
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/* Clients have PP0, PKG */
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#define RAPL_IDX_CLN (1<<RAPL_IDX_PP0_NRG_STAT|\
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1<<RAPL_IDX_PKG_NRG_STAT|\
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1<<RAPL_IDX_PP1_NRG_STAT)
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/* Servers have PP0, PKG, RAM */
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#define RAPL_IDX_SRV (1<<RAPL_IDX_PP0_NRG_STAT|\
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1<<RAPL_IDX_PKG_NRG_STAT|\
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1<<RAPL_IDX_RAM_NRG_STAT)
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/*
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* event code: LSB 8 bits, passed in attr->config
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* any other bit is reserved
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*/
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#define RAPL_EVENT_MASK 0xFFULL
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#define DEFINE_RAPL_FORMAT_ATTR(_var, _name, _format) \
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static ssize_t __rapl_##_var##_show(struct kobject *kobj, \
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struct kobj_attribute *attr, \
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char *page) \
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{ \
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BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \
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return sprintf(page, _format "\n"); \
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} \
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static struct kobj_attribute format_attr_##_var = \
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__ATTR(_name, 0444, __rapl_##_var##_show, NULL)
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#define RAPL_EVENT_DESC(_name, _config) \
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{ \
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.attr = __ATTR(_name, 0444, rapl_event_show, NULL), \
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.config = _config, \
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}
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#define RAPL_CNTR_WIDTH 32 /* 32-bit rapl counters */
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struct rapl_pmu {
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spinlock_t lock;
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int hw_unit; /* 1/2^hw_unit Joule */
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int n_active; /* number of active events */
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struct list_head active_list;
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struct pmu *pmu; /* pointer to rapl_pmu_class */
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ktime_t timer_interval; /* in ktime_t unit */
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struct hrtimer hrtimer;
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};
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static struct pmu rapl_pmu_class;
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static cpumask_t rapl_cpu_mask;
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static int rapl_cntr_mask;
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static DEFINE_PER_CPU(struct rapl_pmu *, rapl_pmu);
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static DEFINE_PER_CPU(struct rapl_pmu *, rapl_pmu_to_free);
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static inline u64 rapl_read_counter(struct perf_event *event)
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{
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u64 raw;
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rdmsrl(event->hw.event_base, raw);
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return raw;
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}
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static inline u64 rapl_scale(u64 v)
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{
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/*
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* scale delta to smallest unit (1/2^32)
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* users must then scale back: count * 1/(1e9*2^32) to get Joules
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* or use ldexp(count, -32).
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* Watts = Joules/Time delta
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*/
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return v << (32 - __get_cpu_var(rapl_pmu)->hw_unit);
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}
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static u64 rapl_event_update(struct perf_event *event)
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{
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struct hw_perf_event *hwc = &event->hw;
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u64 prev_raw_count, new_raw_count;
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s64 delta, sdelta;
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int shift = RAPL_CNTR_WIDTH;
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again:
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prev_raw_count = local64_read(&hwc->prev_count);
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rdmsrl(event->hw.event_base, new_raw_count);
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if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
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new_raw_count) != prev_raw_count) {
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cpu_relax();
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goto again;
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}
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/*
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* Now we have the new raw value and have updated the prev
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* timestamp already. We can now calculate the elapsed delta
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* (event-)time and add that to the generic event.
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*
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* Careful, not all hw sign-extends above the physical width
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* of the count.
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*/
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delta = (new_raw_count << shift) - (prev_raw_count << shift);
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delta >>= shift;
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sdelta = rapl_scale(delta);
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local64_add(sdelta, &event->count);
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return new_raw_count;
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}
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static void rapl_start_hrtimer(struct rapl_pmu *pmu)
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{
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__hrtimer_start_range_ns(&pmu->hrtimer,
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pmu->timer_interval, 0,
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HRTIMER_MODE_REL_PINNED, 0);
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}
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static void rapl_stop_hrtimer(struct rapl_pmu *pmu)
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{
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hrtimer_cancel(&pmu->hrtimer);
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}
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static enum hrtimer_restart rapl_hrtimer_handle(struct hrtimer *hrtimer)
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{
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struct rapl_pmu *pmu = __get_cpu_var(rapl_pmu);
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struct perf_event *event;
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unsigned long flags;
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if (!pmu->n_active)
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return HRTIMER_NORESTART;
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spin_lock_irqsave(&pmu->lock, flags);
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list_for_each_entry(event, &pmu->active_list, active_entry) {
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rapl_event_update(event);
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}
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spin_unlock_irqrestore(&pmu->lock, flags);
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hrtimer_forward_now(hrtimer, pmu->timer_interval);
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return HRTIMER_RESTART;
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}
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static void rapl_hrtimer_init(struct rapl_pmu *pmu)
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{
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struct hrtimer *hr = &pmu->hrtimer;
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hrtimer_init(hr, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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hr->function = rapl_hrtimer_handle;
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}
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static void __rapl_pmu_event_start(struct rapl_pmu *pmu,
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struct perf_event *event)
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{
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if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED)))
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return;
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event->hw.state = 0;
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list_add_tail(&event->active_entry, &pmu->active_list);
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local64_set(&event->hw.prev_count, rapl_read_counter(event));
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pmu->n_active++;
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if (pmu->n_active == 1)
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rapl_start_hrtimer(pmu);
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}
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static void rapl_pmu_event_start(struct perf_event *event, int mode)
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{
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struct rapl_pmu *pmu = __get_cpu_var(rapl_pmu);
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unsigned long flags;
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spin_lock_irqsave(&pmu->lock, flags);
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__rapl_pmu_event_start(pmu, event);
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spin_unlock_irqrestore(&pmu->lock, flags);
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}
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static void rapl_pmu_event_stop(struct perf_event *event, int mode)
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{
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struct rapl_pmu *pmu = __get_cpu_var(rapl_pmu);
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struct hw_perf_event *hwc = &event->hw;
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unsigned long flags;
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spin_lock_irqsave(&pmu->lock, flags);
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/* mark event as deactivated and stopped */
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if (!(hwc->state & PERF_HES_STOPPED)) {
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WARN_ON_ONCE(pmu->n_active <= 0);
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pmu->n_active--;
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if (pmu->n_active == 0)
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rapl_stop_hrtimer(pmu);
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list_del(&event->active_entry);
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WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
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hwc->state |= PERF_HES_STOPPED;
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}
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/* check if update of sw counter is necessary */
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if ((mode & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
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/*
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* Drain the remaining delta count out of a event
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* that we are disabling:
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*/
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rapl_event_update(event);
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hwc->state |= PERF_HES_UPTODATE;
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}
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spin_unlock_irqrestore(&pmu->lock, flags);
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}
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static int rapl_pmu_event_add(struct perf_event *event, int mode)
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{
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struct rapl_pmu *pmu = __get_cpu_var(rapl_pmu);
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struct hw_perf_event *hwc = &event->hw;
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unsigned long flags;
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spin_lock_irqsave(&pmu->lock, flags);
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hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
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if (mode & PERF_EF_START)
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__rapl_pmu_event_start(pmu, event);
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spin_unlock_irqrestore(&pmu->lock, flags);
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return 0;
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}
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static void rapl_pmu_event_del(struct perf_event *event, int flags)
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{
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rapl_pmu_event_stop(event, PERF_EF_UPDATE);
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}
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static int rapl_pmu_event_init(struct perf_event *event)
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{
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u64 cfg = event->attr.config & RAPL_EVENT_MASK;
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int bit, msr, ret = 0;
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/* only look at RAPL events */
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if (event->attr.type != rapl_pmu_class.type)
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return -ENOENT;
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/* check only supported bits are set */
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if (event->attr.config & ~RAPL_EVENT_MASK)
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return -EINVAL;
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/*
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* check event is known (determines counter)
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*/
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switch (cfg) {
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case INTEL_RAPL_PP0:
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bit = RAPL_IDX_PP0_NRG_STAT;
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msr = MSR_PP0_ENERGY_STATUS;
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break;
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case INTEL_RAPL_PKG:
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bit = RAPL_IDX_PKG_NRG_STAT;
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msr = MSR_PKG_ENERGY_STATUS;
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break;
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case INTEL_RAPL_RAM:
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bit = RAPL_IDX_RAM_NRG_STAT;
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msr = MSR_DRAM_ENERGY_STATUS;
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break;
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case INTEL_RAPL_PP1:
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bit = RAPL_IDX_PP1_NRG_STAT;
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msr = MSR_PP1_ENERGY_STATUS;
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break;
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default:
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return -EINVAL;
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}
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/* check event supported */
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if (!(rapl_cntr_mask & (1 << bit)))
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return -EINVAL;
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/* unsupported modes and filters */
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if (event->attr.exclude_user ||
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event->attr.exclude_kernel ||
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event->attr.exclude_hv ||
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event->attr.exclude_idle ||
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event->attr.exclude_host ||
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event->attr.exclude_guest ||
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event->attr.sample_period) /* no sampling */
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return -EINVAL;
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/* must be done before validate_group */
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event->hw.event_base = msr;
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event->hw.config = cfg;
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event->hw.idx = bit;
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return ret;
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}
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static void rapl_pmu_event_read(struct perf_event *event)
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{
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rapl_event_update(event);
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}
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static ssize_t rapl_get_attr_cpumask(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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int n = cpulist_scnprintf(buf, PAGE_SIZE - 2, &rapl_cpu_mask);
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buf[n++] = '\n';
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buf[n] = '\0';
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return n;
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}
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static DEVICE_ATTR(cpumask, S_IRUGO, rapl_get_attr_cpumask, NULL);
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static struct attribute *rapl_pmu_attrs[] = {
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&dev_attr_cpumask.attr,
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NULL,
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};
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static struct attribute_group rapl_pmu_attr_group = {
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.attrs = rapl_pmu_attrs,
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};
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EVENT_ATTR_STR(energy-cores, rapl_cores, "event=0x01");
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EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event=0x02");
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EVENT_ATTR_STR(energy-ram , rapl_ram, "event=0x03");
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EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=0x04");
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EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules");
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EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules");
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EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules");
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EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules");
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/*
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* we compute in 0.23 nJ increments regardless of MSR
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*/
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EVENT_ATTR_STR(energy-cores.scale, rapl_cores_scale, "2.3283064365386962890625e-10");
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EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scale, "2.3283064365386962890625e-10");
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EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386962890625e-10");
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EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10");
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static struct attribute *rapl_events_srv_attr[] = {
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EVENT_PTR(rapl_cores),
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EVENT_PTR(rapl_pkg),
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EVENT_PTR(rapl_ram),
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EVENT_PTR(rapl_cores_unit),
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EVENT_PTR(rapl_pkg_unit),
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EVENT_PTR(rapl_ram_unit),
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EVENT_PTR(rapl_cores_scale),
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EVENT_PTR(rapl_pkg_scale),
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EVENT_PTR(rapl_ram_scale),
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NULL,
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};
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static struct attribute *rapl_events_cln_attr[] = {
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EVENT_PTR(rapl_cores),
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EVENT_PTR(rapl_pkg),
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EVENT_PTR(rapl_gpu),
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EVENT_PTR(rapl_cores_unit),
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EVENT_PTR(rapl_pkg_unit),
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EVENT_PTR(rapl_gpu_unit),
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EVENT_PTR(rapl_cores_scale),
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EVENT_PTR(rapl_pkg_scale),
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EVENT_PTR(rapl_gpu_scale),
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NULL,
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};
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static struct attribute_group rapl_pmu_events_group = {
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.name = "events",
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.attrs = NULL, /* patched at runtime */
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};
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DEFINE_RAPL_FORMAT_ATTR(event, event, "config:0-7");
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static struct attribute *rapl_formats_attr[] = {
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&format_attr_event.attr,
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NULL,
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};
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static struct attribute_group rapl_pmu_format_group = {
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.name = "format",
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.attrs = rapl_formats_attr,
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};
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const struct attribute_group *rapl_attr_groups[] = {
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&rapl_pmu_attr_group,
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&rapl_pmu_format_group,
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&rapl_pmu_events_group,
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NULL,
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};
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static struct pmu rapl_pmu_class = {
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.attr_groups = rapl_attr_groups,
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.task_ctx_nr = perf_invalid_context, /* system-wide only */
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.event_init = rapl_pmu_event_init,
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.add = rapl_pmu_event_add, /* must have */
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.del = rapl_pmu_event_del, /* must have */
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.start = rapl_pmu_event_start,
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.stop = rapl_pmu_event_stop,
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.read = rapl_pmu_event_read,
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};
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static void rapl_cpu_exit(int cpu)
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{
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struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
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int i, phys_id = topology_physical_package_id(cpu);
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int target = -1;
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/* find a new cpu on same package */
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for_each_online_cpu(i) {
|
|
if (i == cpu)
|
|
continue;
|
|
if (phys_id == topology_physical_package_id(i)) {
|
|
target = i;
|
|
break;
|
|
}
|
|
}
|
|
/*
|
|
* clear cpu from cpumask
|
|
* if was set in cpumask and still some cpu on package,
|
|
* then move to new cpu
|
|
*/
|
|
if (cpumask_test_and_clear_cpu(cpu, &rapl_cpu_mask) && target >= 0)
|
|
cpumask_set_cpu(target, &rapl_cpu_mask);
|
|
|
|
WARN_ON(cpumask_empty(&rapl_cpu_mask));
|
|
/*
|
|
* migrate events and context to new cpu
|
|
*/
|
|
if (target >= 0)
|
|
perf_pmu_migrate_context(pmu->pmu, cpu, target);
|
|
|
|
/* cancel overflow polling timer for CPU */
|
|
rapl_stop_hrtimer(pmu);
|
|
}
|
|
|
|
static void rapl_cpu_init(int cpu)
|
|
{
|
|
int i, phys_id = topology_physical_package_id(cpu);
|
|
|
|
/* check if phys_is is already covered */
|
|
for_each_cpu(i, &rapl_cpu_mask) {
|
|
if (phys_id == topology_physical_package_id(i))
|
|
return;
|
|
}
|
|
/* was not found, so add it */
|
|
cpumask_set_cpu(cpu, &rapl_cpu_mask);
|
|
}
|
|
|
|
static int rapl_cpu_prepare(int cpu)
|
|
{
|
|
struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
|
|
int phys_id = topology_physical_package_id(cpu);
|
|
u64 ms;
|
|
|
|
if (pmu)
|
|
return 0;
|
|
|
|
if (phys_id < 0)
|
|
return -1;
|
|
|
|
pmu = kzalloc_node(sizeof(*pmu), GFP_KERNEL, cpu_to_node(cpu));
|
|
if (!pmu)
|
|
return -1;
|
|
|
|
spin_lock_init(&pmu->lock);
|
|
|
|
INIT_LIST_HEAD(&pmu->active_list);
|
|
|
|
/*
|
|
* grab power unit as: 1/2^unit Joules
|
|
*
|
|
* we cache in local PMU instance
|
|
*/
|
|
rdmsrl(MSR_RAPL_POWER_UNIT, pmu->hw_unit);
|
|
pmu->hw_unit = (pmu->hw_unit >> 8) & 0x1FULL;
|
|
pmu->pmu = &rapl_pmu_class;
|
|
|
|
/*
|
|
* use reference of 200W for scaling the timeout
|
|
* to avoid missing counter overflows.
|
|
* 200W = 200 Joules/sec
|
|
* divide interval by 2 to avoid lockstep (2 * 100)
|
|
* if hw unit is 32, then we use 2 ms 1/200/2
|
|
*/
|
|
if (pmu->hw_unit < 32)
|
|
ms = (1000 / (2 * 100)) * (1ULL << (32 - pmu->hw_unit - 1));
|
|
else
|
|
ms = 2;
|
|
|
|
pmu->timer_interval = ms_to_ktime(ms);
|
|
|
|
rapl_hrtimer_init(pmu);
|
|
|
|
/* set RAPL pmu for this cpu for now */
|
|
per_cpu(rapl_pmu, cpu) = pmu;
|
|
per_cpu(rapl_pmu_to_free, cpu) = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void rapl_cpu_kfree(int cpu)
|
|
{
|
|
struct rapl_pmu *pmu = per_cpu(rapl_pmu_to_free, cpu);
|
|
|
|
kfree(pmu);
|
|
|
|
per_cpu(rapl_pmu_to_free, cpu) = NULL;
|
|
}
|
|
|
|
static int rapl_cpu_dying(int cpu)
|
|
{
|
|
struct rapl_pmu *pmu = per_cpu(rapl_pmu, cpu);
|
|
|
|
if (!pmu)
|
|
return 0;
|
|
|
|
per_cpu(rapl_pmu, cpu) = NULL;
|
|
|
|
per_cpu(rapl_pmu_to_free, cpu) = pmu;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rapl_cpu_notifier(struct notifier_block *self,
|
|
unsigned long action, void *hcpu)
|
|
{
|
|
unsigned int cpu = (long)hcpu;
|
|
|
|
switch (action & ~CPU_TASKS_FROZEN) {
|
|
case CPU_UP_PREPARE:
|
|
rapl_cpu_prepare(cpu);
|
|
break;
|
|
case CPU_STARTING:
|
|
rapl_cpu_init(cpu);
|
|
break;
|
|
case CPU_UP_CANCELED:
|
|
case CPU_DYING:
|
|
rapl_cpu_dying(cpu);
|
|
break;
|
|
case CPU_ONLINE:
|
|
case CPU_DEAD:
|
|
rapl_cpu_kfree(cpu);
|
|
break;
|
|
case CPU_DOWN_PREPARE:
|
|
rapl_cpu_exit(cpu);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static const struct x86_cpu_id rapl_cpu_match[] = {
|
|
[0] = { .vendor = X86_VENDOR_INTEL, .family = 6 },
|
|
[1] = {},
|
|
};
|
|
|
|
static int __init rapl_pmu_init(void)
|
|
{
|
|
struct rapl_pmu *pmu;
|
|
int cpu, ret;
|
|
|
|
/*
|
|
* check for Intel processor family 6
|
|
*/
|
|
if (!x86_match_cpu(rapl_cpu_match))
|
|
return 0;
|
|
|
|
/* check supported CPU */
|
|
switch (boot_cpu_data.x86_model) {
|
|
case 42: /* Sandy Bridge */
|
|
case 58: /* Ivy Bridge */
|
|
case 60: /* Haswell */
|
|
case 69: /* Haswell-Celeron */
|
|
rapl_cntr_mask = RAPL_IDX_CLN;
|
|
rapl_pmu_events_group.attrs = rapl_events_cln_attr;
|
|
break;
|
|
case 45: /* Sandy Bridge-EP */
|
|
case 62: /* IvyTown */
|
|
rapl_cntr_mask = RAPL_IDX_SRV;
|
|
rapl_pmu_events_group.attrs = rapl_events_srv_attr;
|
|
break;
|
|
|
|
default:
|
|
/* unsupported */
|
|
return 0;
|
|
}
|
|
get_online_cpus();
|
|
|
|
for_each_online_cpu(cpu) {
|
|
rapl_cpu_prepare(cpu);
|
|
rapl_cpu_init(cpu);
|
|
}
|
|
|
|
perf_cpu_notifier(rapl_cpu_notifier);
|
|
|
|
ret = perf_pmu_register(&rapl_pmu_class, "power", -1);
|
|
if (WARN_ON(ret)) {
|
|
pr_info("RAPL PMU detected, registration failed (%d), RAPL PMU disabled\n", ret);
|
|
put_online_cpus();
|
|
return -1;
|
|
}
|
|
|
|
pmu = __get_cpu_var(rapl_pmu);
|
|
|
|
pr_info("RAPL PMU detected, hw unit 2^-%d Joules,"
|
|
" API unit is 2^-32 Joules,"
|
|
" %d fixed counters"
|
|
" %llu ms ovfl timer\n",
|
|
pmu->hw_unit,
|
|
hweight32(rapl_cntr_mask),
|
|
ktime_to_ms(pmu->timer_interval));
|
|
|
|
put_online_cpus();
|
|
|
|
return 0;
|
|
}
|
|
device_initcall(rapl_pmu_init);
|