mirror of
https://github.com/torvalds/linux.git
synced 2024-12-25 12:21:37 +00:00
b2a63431b4
"clock-latency" is incorrectly written as "transition-latency" in an example present in Documentation of cpufreq-cpu0. Fix it. Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
56 lines
1.2 KiB
Plaintext
56 lines
1.2 KiB
Plaintext
Generic CPU0 cpufreq driver
|
|
|
|
It is a generic cpufreq driver for CPU0 frequency management. It
|
|
supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
|
|
systems which share clock and voltage across all CPUs.
|
|
|
|
Both required and optional properties listed below must be defined
|
|
under node /cpus/cpu@0.
|
|
|
|
Required properties:
|
|
- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
|
|
for details
|
|
|
|
Optional properties:
|
|
- clock-latency: Specify the possible maximum transition latency for clock,
|
|
in unit of nanoseconds.
|
|
- voltage-tolerance: Specify the CPU voltage tolerance in percentage.
|
|
|
|
Examples:
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
compatible = "arm,cortex-a9";
|
|
reg = <0>;
|
|
next-level-cache = <&L2>;
|
|
operating-points = <
|
|
/* kHz uV */
|
|
792000 1100000
|
|
396000 950000
|
|
198000 850000
|
|
>;
|
|
clock-latency = <61036>; /* two CLK32 periods */
|
|
};
|
|
|
|
cpu@1 {
|
|
compatible = "arm,cortex-a9";
|
|
reg = <1>;
|
|
next-level-cache = <&L2>;
|
|
};
|
|
|
|
cpu@2 {
|
|
compatible = "arm,cortex-a9";
|
|
reg = <2>;
|
|
next-level-cache = <&L2>;
|
|
};
|
|
|
|
cpu@3 {
|
|
compatible = "arm,cortex-a9";
|
|
reg = <3>;
|
|
next-level-cache = <&L2>;
|
|
};
|
|
};
|