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17ce252266
Add driver to enable PCIe board which uses XDMA (the DMA/Bridge Subsystem
for PCI Express). For example, Xilinx Alveo PCIe devices.
https://www.xilinx.com/products/boards-and-kits/alveo.html
The XDMA engine support up to 4 Host to Card (H2C) and 4 Card to Host (C2H)
channels. Memory transfers are specified on a per-channel basis in
descriptor linked lists, which the DMA fetches from host memory and
processes. Events such as descriptor completion and errors are signaled
using interrupts. The hardware detail is provided by
https://docs.xilinx.com/r/en-US/pg195-pcie-dma/Introduction
This driver implements dmaengine APIs.
- probe the available DMA channels
- use dma_slave_map for channel lookup
- use virtual channel to manage dmaengine tx descriptors
- implement device_prep_slave_sg callback to handle host scatter gather
list
- implement device_config to config device address for DMA transfer
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
Signed-off-by: Sonal Santan <sonal.santan@amd.com>
Signed-off-by: Max Zhen <max.zhen@amd.com>
Signed-off-by: Brian Xu <brian.xu@amd.com>
Tested-by: Martin Tuma <tumic@gpxsee.org>
Link: https://lore.kernel.org/r/1674145926-29449-2-git-send-email-lizhi.hou@amd.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
815 lines
23 KiB
Plaintext
815 lines
23 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# DMA engine configuration
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#
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menuconfig DMADEVICES
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bool "DMA Engine support"
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depends on HAS_DMA
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help
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DMA engines can do asynchronous data transfers without
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involving the host CPU. Currently, this framework can be
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used to offload memory copies in the network stack and
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RAID operations in the MD driver. This menu only presents
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DMA Device drivers supported by the configured arch, it may
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be empty in some cases.
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config DMADEVICES_DEBUG
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bool "DMA Engine debugging"
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depends on DMADEVICES != n
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help
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This is an option for use by developers; most people should
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say N here. This enables DMA engine core and driver debugging.
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config DMADEVICES_VDEBUG
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bool "DMA Engine verbose debugging"
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depends on DMADEVICES_DEBUG != n
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help
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This is an option for use by developers; most people should
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say N here. This enables deeper (more verbose) debugging of
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the DMA engine core and drivers.
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if DMADEVICES
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comment "DMA Devices"
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#core
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config ASYNC_TX_ENABLE_CHANNEL_SWITCH
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bool
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config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
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bool
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config DMA_ENGINE
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bool
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config DMA_VIRTUAL_CHANNELS
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tristate
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config DMA_ACPI
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def_bool y
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depends on ACPI
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config DMA_OF
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def_bool y
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depends on OF
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select DMA_ENGINE
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#devices
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config ALTERA_MSGDMA
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tristate "Altera / Intel mSGDMA Engine"
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depends on HAS_IOMEM
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select DMA_ENGINE
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help
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Enable support for Altera / Intel mSGDMA controller.
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config AMBA_PL08X
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bool "ARM PrimeCell PL080 or PL081 support"
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depends on ARM_AMBA
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Say yes if your platform has a PL08x DMAC device which can
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provide DMA engine support. This includes the original ARM
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PL080 and PL081, Samsungs PL080 derivative and Faraday
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Technology's FTDMAC020 PL080 derivative.
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config AMCC_PPC440SPE_ADMA
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tristate "AMCC PPC440SPe ADMA support"
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depends on 440SPe || 440SP
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for the AMCC PPC440SPe RAID engines.
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config APPLE_ADMAC
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tristate "Apple ADMAC support"
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depends on ARCH_APPLE || COMPILE_TEST
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select DMA_ENGINE
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default ARCH_APPLE
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help
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Enable support for Audio DMA Controller found on Apple Silicon SoCs.
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config AT_HDMAC
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tristate "Atmel AHB DMA support"
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depends on ARCH_AT91
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the Atmel AHB DMA controller.
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config AT_XDMAC
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tristate "Atmel XDMA support"
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depends on ARCH_AT91
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select DMA_ENGINE
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help
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Support the Atmel XDMA controller.
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config AXI_DMAC
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tristate "Analog Devices AXI-DMAC DMA support"
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depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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select REGMAP_MMIO
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help
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Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
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controller is often used in Analog Devices' reference designs for FPGA
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platforms.
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config BCM_SBA_RAID
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tristate "Broadcom SBA RAID engine support"
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depends on ARM64 || COMPILE_TEST
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depends on MAILBOX && RAID6_PQ
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ASYNC_TX_DISABLE_XOR_VAL_DMA
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select ASYNC_TX_DISABLE_PQ_VAL_DMA
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default m if ARCH_BCM_IPROC
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help
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Enable support for Broadcom SBA RAID Engine. The SBA RAID
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engine is available on most of the Broadcom iProc SoCs. It
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has the capability to offload memcpy, xor and pq computation
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for raid5/6.
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config DMA_BCM2835
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tristate "BCM2835 DMA engine support"
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depends on ARCH_BCM2835
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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config DMA_JZ4780
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tristate "JZ4780 DMA support"
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depends on MIPS || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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This selects support for the DMA controller in Ingenic JZ4780 SoCs.
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If you have a board based on such a SoC and wish to use DMA for
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devices which can use the DMA controller, say Y or M here.
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config DMA_SA11X0
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tristate "SA-11x0 DMA support"
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depends on ARCH_SA1100 || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the DMA engine found on Intel StrongARM SA-1100 and
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SA-1110 SoCs. This DMA engine can only be used with on-chip
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devices.
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config DMA_SUN4I
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tristate "Allwinner A10 DMA SoCs support"
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
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default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Enable support for the DMA controller present in the sun4i,
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sun5i and sun7i Allwinner ARM SoCs.
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config DMA_SUN6I
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tristate "Allwinner A31 SoCs DMA support"
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depends on ARCH_SUNXI || COMPILE_TEST
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depends on RESET_CONTROLLER
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the DMA engine first found in Allwinner A31 SoCs.
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config DW_AXI_DMAC
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tristate "Synopsys DesignWare AXI DMA support"
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depends on OF
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depends on HAS_IOMEM
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Enable support for Synopsys DesignWare AXI DMA controller.
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NOTE: This driver wasn't tested on 64 bit platform because
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of lack 64 bit platform with Synopsys DW AXI DMAC.
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config EP93XX_DMA
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bool "Cirrus Logic EP93xx DMA support"
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depends on ARCH_EP93XX || COMPILE_TEST
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select DMA_ENGINE
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help
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Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
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config FSL_DMA
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tristate "Freescale Elo series DMA support"
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depends on FSL_SOC
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select DMA_ENGINE
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for the Freescale Elo series DMA controllers.
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The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
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EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
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some Txxx and Bxxx parts.
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config FSL_EDMA
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tristate "Freescale eDMA engine support"
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depends on OF
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the Freescale eDMA engine with programmable channel
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multiplexing capability for DMA request sources(slot).
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This module can be found on Freescale Vybrid and LS-1 SoCs.
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config FSL_QDMA
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tristate "NXP Layerscape qDMA engine support"
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depends on ARM || ARM64
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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select DMA_ENGINE_RAID
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Support the NXP Layerscape qDMA engine with command queue and legacy mode.
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Channel virtualization is supported through enqueuing of DMA jobs to,
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or dequeuing DMA jobs from, different work queues.
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This module can be found on NXP Layerscape SoCs.
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The qdma driver only work on SoCs with a DPAA hardware block.
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config FSL_RAID
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tristate "Freescale RAID engine Support"
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depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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help
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Enable support for Freescale RAID Engine. RAID Engine is
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available on some QorIQ SoCs (like P5020/P5040). It has
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the capability to offload memcpy, xor and pq computation
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for raid5/6.
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config HISI_DMA
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tristate "HiSilicon DMA Engine support"
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depends on ARCH_HISI || COMPILE_TEST
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depends on PCI_MSI
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support HiSilicon Kunpeng DMA engine.
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config IMG_MDC_DMA
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tristate "IMG MDC support"
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depends on MIPS || COMPILE_TEST
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depends on MFD_SYSCON
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Enable support for the IMG multi-threaded DMA controller (MDC).
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config IMX_DMA
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tristate "i.MX DMA support"
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depends on ARCH_MXC
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select DMA_ENGINE
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help
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Support the i.MX DMA engine. This engine is integrated into
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Freescale i.MX1/21/27 chips.
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config IMX_SDMA
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tristate "i.MX SDMA support"
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depends on ARCH_MXC
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the i.MX SDMA engine. This engine is integrated into
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Freescale i.MX25/31/35/51/53/6 chips.
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config INTEL_IDMA64
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tristate "Intel integrated DMA 64-bit support"
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Enable DMA support for Intel Low Power Subsystem such as found on
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Intel Skylake PCH.
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config INTEL_IDXD_BUS
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tristate
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default INTEL_IDXD
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config INTEL_IDXD
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tristate "Intel Data Accelerators support"
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depends on PCI && X86_64 && !UML
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depends on PCI_MSI
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depends on PCI_PASID
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depends on SBITMAP
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select DMA_ENGINE
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help
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Enable support for the Intel(R) data accelerators present
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in Intel Xeon CPU.
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Say Y if you have such a platform.
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If unsure, say N.
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config INTEL_IDXD_COMPAT
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bool "Legacy behavior for idxd driver"
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depends on PCI && X86_64
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select INTEL_IDXD_BUS
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help
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Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
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The old behavior performed driver bind/unbind for device and wq
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devices all under the dsa driver. The compat driver will emulate
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the legacy behavior in order to allow existing support apps (i.e.
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accel-config) to continue function. It is expected that accel-config
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v3.2 and earlier will need the compat mode. A distro with later
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accel-config version can disable this compat config.
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Say Y if you have old applications that require such behavior.
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If unsure, say N.
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# Config symbol that collects all the dependencies that's necessary to
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# support shared virtual memory for the devices supported by idxd.
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config INTEL_IDXD_SVM
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bool "Accelerator Shared Virtual Memory Support"
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depends on INTEL_IDXD
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depends on INTEL_IOMMU_SVM
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depends on PCI_PRI
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depends on PCI_PASID
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depends on PCI_IOV
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config INTEL_IDXD_PERFMON
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bool "Intel Data Accelerators performance monitor support"
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depends on INTEL_IDXD
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help
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Enable performance monitor (pmu) support for the Intel(R)
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data accelerators present in Intel Xeon CPU. With this
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enabled, perf can be used to monitor the DSA (Intel Data
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Streaming Accelerator) events described in the Intel DSA
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spec.
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If unsure, say N.
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config INTEL_IOATDMA
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tristate "Intel I/OAT DMA support"
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depends on PCI && X86_64 && !UML
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select DCA
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help
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Enable support for the Intel(R) I/OAT DMA engine present
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in recent Intel Xeon chipsets.
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Say Y here if you have such a chipset.
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If unsure, say N.
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config K3_DMA
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tristate "Hisilicon K3 DMA support"
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depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the DMA engine for Hisilicon K3 platform
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devices.
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config LPC18XX_DMAMUX
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bool "NXP LPC18xx/43xx DMA MUX for PL080"
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depends on ARCH_LPC18XX || COMPILE_TEST
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depends on OF && AMBA_PL08X
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select MFD_SYSCON
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help
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Enable support for DMA on NXP LPC18xx/43xx platforms
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with PL080 and multiplexed DMA request lines.
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config MCF_EDMA
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tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
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depends on M5441x || COMPILE_TEST
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support the Freescale ColdFire eDMA engine, 64-channel
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implementation that performs complex data transfers with
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minimal intervention from a host processor.
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This module can be found on Freescale ColdFire mcf5441x SoCs.
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config MILBEAUT_HDMAC
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tristate "Milbeaut AHB DMA support"
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depends on ARCH_MILBEAUT || COMPILE_TEST
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depends on OF
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Say yes here to support the Socionext Milbeaut
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HDMAC device.
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config MILBEAUT_XDMAC
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tristate "Milbeaut AXI DMA support"
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depends on ARCH_MILBEAUT || COMPILE_TEST
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depends on OF
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Say yes here to support the Socionext Milbeaut
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XDMAC device.
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config MMP_PDMA
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tristate "MMP PDMA support"
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depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
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select DMA_ENGINE
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help
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Support the MMP PDMA engine for PXA and MMP platform.
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config MMP_TDMA
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tristate "MMP Two-Channel DMA support"
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depends on ARCH_MMP || COMPILE_TEST
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select DMA_ENGINE
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select GENERIC_ALLOCATOR
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help
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Support the MMP Two-Channel DMA engine.
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This engine used for MMP Audio DMA and pxa910 SQU.
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config MOXART_DMA
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tristate "MOXART DMA support"
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depends on ARCH_MOXART
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Enable support for the MOXA ART SoC DMA controller.
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Say Y here if you enabled MMP ADMA, otherwise say N.
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config MPC512X_DMA
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tristate "Freescale MPC512x built-in DMA engine support"
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depends on PPC_MPC512x || PPC_MPC831x
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select DMA_ENGINE
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help
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Enable support for the Freescale MPC512x built-in DMA engine.
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config MV_XOR
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bool "Marvell XOR engine support"
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depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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help
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Enable support for the Marvell XOR engine.
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config MV_XOR_V2
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bool "Marvell XOR engine version 2 support "
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depends on ARM64
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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select GENERIC_MSI_IRQ
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help
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Enable support for the Marvell version 2 XOR engine.
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This engine provides acceleration for copy, XOR and RAID6
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operations, and is available on Marvell Armada 7K and 8K
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platforms.
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config MXS_DMA
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bool "MXS DMA support"
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depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
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select STMP_DEVICE
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select DMA_ENGINE
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help
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Support the MXS DMA engine. This engine including APBH-DMA
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and APBX-DMA is integrated into some Freescale chips.
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config MX3_IPU
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bool "MX3x Image Processing Unit support"
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depends on ARCH_MXC
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select DMA_ENGINE
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default y
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help
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If you plan to use the Image Processing unit in the i.MX3x, say
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Y here. If unsure, select Y.
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config MX3_IPU_IRQS
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int "Number of dynamically mapped interrupts for IPU"
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depends on MX3_IPU
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range 2 137
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default 4
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help
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Out of 137 interrupt sources on i.MX31 IPU only very few are used.
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To avoid bloating the irq_desc[] array we allocate a sufficient
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number of IRQ slots and map them dynamically to specific sources.
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config NBPFAXI_DMA
|
|
tristate "Renesas Type-AXI NBPF DMA support"
|
|
select DMA_ENGINE
|
|
depends on ARM || COMPILE_TEST
|
|
help
|
|
Support for "Type-AXI" NBPF DMA IPs from Renesas
|
|
|
|
config OWL_DMA
|
|
tristate "Actions Semi Owl SoCs DMA support"
|
|
depends on ARCH_ACTIONS
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the Actions Semi Owl SoCs DMA controller.
|
|
|
|
config PCH_DMA
|
|
tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
|
|
depends on PCI && (X86_32 || COMPILE_TEST)
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for Intel EG20T PCH DMA engine.
|
|
|
|
This driver also can be used for LAPIS Semiconductor IOH(Input/
|
|
Output Hub), ML7213, ML7223 and ML7831.
|
|
ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
|
|
for MP(Media Phone) use and ML7831 IOH is for general purpose use.
|
|
ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
|
|
ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
|
|
|
|
config PL330_DMA
|
|
tristate "DMA API Driver for PL330"
|
|
select DMA_ENGINE
|
|
depends on ARM_AMBA
|
|
help
|
|
Select if your platform has one or more PL330 DMACs.
|
|
You need to provide platform specific settings via
|
|
platform_data for a dma-pl330 device.
|
|
|
|
config PXA_DMA
|
|
bool "PXA DMA support"
|
|
depends on (ARCH_MMP || ARCH_PXA)
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Support the DMA engine for PXA. It is also compatible with MMP PDMA
|
|
platform. The internal DMA IP of all PXA variants is supported, with
|
|
16 to 32 channels for peripheral to memory or memory to memory
|
|
transfers.
|
|
|
|
config PLX_DMA
|
|
tristate "PLX ExpressLane PEX Switch DMA Engine Support"
|
|
depends on PCI
|
|
select DMA_ENGINE
|
|
help
|
|
Some PLX ExpressLane PCI Switches support additional DMA engines.
|
|
These are exposed via extra functions on the switch's
|
|
upstream port. Each function exposes one DMA channel.
|
|
|
|
config STE_DMA40
|
|
bool "ST-Ericsson DMA40 support"
|
|
depends on ARCH_U8500
|
|
select DMA_ENGINE
|
|
help
|
|
Support for ST-Ericsson DMA40 controller
|
|
|
|
config ST_FDMA
|
|
tristate "ST FDMA dmaengine support"
|
|
depends on ARCH_STI
|
|
depends on REMOTEPROC
|
|
select ST_SLIM_REMOTEPROC
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for ST FDMA controller.
|
|
It supports 16 independent DMA channels, accepts up to 32 DMA requests
|
|
|
|
Say Y here if you have such a chipset.
|
|
If unsure, say N.
|
|
|
|
config STM32_DMA
|
|
bool "STMicroelectronics STM32 DMA support"
|
|
depends on ARCH_STM32 || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the on-chip DMA controller on STMicroelectronics
|
|
STM32 MCUs.
|
|
If you have a board based on such a MCU and wish to use DMA say Y
|
|
here.
|
|
|
|
config STM32_DMAMUX
|
|
bool "STMicroelectronics STM32 dma multiplexer support"
|
|
depends on STM32_DMA || COMPILE_TEST
|
|
help
|
|
Enable support for the on-chip DMA multiplexer on STMicroelectronics
|
|
STM32 MCUs.
|
|
If you have a board based on such a MCU and wish to use DMAMUX say Y
|
|
here.
|
|
|
|
config STM32_MDMA
|
|
bool "STMicroelectronics STM32 master dma support"
|
|
depends on ARCH_STM32 || COMPILE_TEST
|
|
depends on OF
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the on-chip MDMA controller on STMicroelectronics
|
|
STM32 platforms.
|
|
If you have a board based on STM32 SoC and wish to use the master DMA
|
|
say Y here.
|
|
|
|
config SPRD_DMA
|
|
tristate "Spreadtrum DMA support"
|
|
depends on ARCH_SPRD || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the on-chip DMA controller on Spreadtrum platform.
|
|
|
|
config S3C24XX_DMAC
|
|
bool "Samsung S3C24XX DMA support"
|
|
depends on ARCH_S3C24XX || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Support for the Samsung S3C24XX DMA controller driver. The
|
|
DMA controller is having multiple DMA channels which can be
|
|
configured for different peripherals like audio, UART, SPI.
|
|
The DMA controller can transfer data from memory to peripheral,
|
|
periphal to memory, periphal to periphal and memory to memory.
|
|
|
|
config TXX9_DMAC
|
|
tristate "Toshiba TXx9 SoC DMA support"
|
|
depends on MACH_TX49XX
|
|
select DMA_ENGINE
|
|
help
|
|
Support the TXx9 SoC internal DMA controller. This can be
|
|
integrated in chips such as the Toshiba TX4927/38/39.
|
|
|
|
config TEGRA186_GPC_DMA
|
|
tristate "NVIDIA Tegra GPC DMA support"
|
|
depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
|
|
depends on IOMMU_API
|
|
select DMA_ENGINE
|
|
help
|
|
Support for the NVIDIA Tegra General Purpose Central DMA controller.
|
|
The DMA controller has multiple DMA channels which can be configured
|
|
for different peripherals like UART, SPI, etc which are on APB bus.
|
|
This DMA controller transfers data from memory to peripheral FIFO
|
|
or vice versa. It also supports memory to memory data transfer.
|
|
|
|
config TEGRA20_APB_DMA
|
|
tristate "NVIDIA Tegra20 APB DMA support"
|
|
depends on ARCH_TEGRA || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
help
|
|
Support for the NVIDIA Tegra20 APB DMA controller driver. The
|
|
DMA controller is having multiple DMA channel which can be
|
|
configured for different peripherals like audio, UART, SPI,
|
|
I2C etc which is in APB bus.
|
|
This DMA controller transfers data from memory to peripheral fifo
|
|
or vice versa. It does not support memory to memory data transfer.
|
|
|
|
config TEGRA210_ADMA
|
|
tristate "NVIDIA Tegra210 ADMA support"
|
|
depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Support for the NVIDIA Tegra210 ADMA controller driver. The
|
|
DMA controller has multiple DMA channels and is used to service
|
|
various audio clients in the Tegra210 audio processing engine
|
|
(APE). This DMA controller transfers data from memory to
|
|
peripheral and vice versa. It does not support memory to
|
|
memory data transfer.
|
|
|
|
config TIMB_DMA
|
|
tristate "Timberdale FPGA DMA support"
|
|
depends on MFD_TIMBERDALE || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for the Timberdale FPGA DMA engine.
|
|
|
|
config UNIPHIER_MDMAC
|
|
tristate "UniPhier MIO DMAC"
|
|
depends on ARCH_UNIPHIER || COMPILE_TEST
|
|
depends on OF
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the MIO DMAC (Media I/O DMA controller) on the
|
|
UniPhier platform. This DMA controller is used as the external
|
|
DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
|
|
|
|
config UNIPHIER_XDMAC
|
|
tristate "UniPhier XDMAC support"
|
|
depends on ARCH_UNIPHIER || COMPILE_TEST
|
|
depends on OF
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for the XDMAC (external DMA controller) on the
|
|
UniPhier platform. This DMA controller can transfer data from
|
|
memory to memory, memory to peripheral and peripheral to memory.
|
|
|
|
config XGENE_DMA
|
|
tristate "APM X-Gene DMA support"
|
|
depends on ARCH_XGENE || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
select DMA_ENGINE_RAID
|
|
select ASYNC_TX_ENABLE_CHANNEL_SWITCH
|
|
help
|
|
Enable support for the APM X-Gene SoC DMA engine.
|
|
|
|
config XILINX_DMA
|
|
tristate "Xilinx AXI DMAS Engine"
|
|
depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for Xilinx AXI VDMA Soft IP.
|
|
|
|
AXI VDMA engine provides high-bandwidth direct memory access
|
|
between memory and AXI4-Stream video type target
|
|
peripherals including peripherals which support AXI4-
|
|
Stream Video Protocol. It has two stream interfaces/
|
|
channels, Memory Mapped to Stream (MM2S) and Stream to
|
|
Memory Mapped (S2MM) for the data transfers.
|
|
AXI CDMA engine provides high-bandwidth direct memory access
|
|
between a memory-mapped source address and a memory-mapped
|
|
destination address.
|
|
AXI DMA engine provides high-bandwidth one dimensional direct
|
|
memory access between memory and AXI4-Stream target peripherals.
|
|
AXI MCDMA engine provides high-bandwidth direct memory access
|
|
between memory and AXI4-Stream target peripherals. It provides
|
|
the scatter gather interface with multiple channels independent
|
|
configuration support.
|
|
|
|
config XILINX_XDMA
|
|
tristate "Xilinx DMA/Bridge Subsystem DMA Engine"
|
|
depends on HAS_IOMEM
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
select REGMAP_MMIO
|
|
help
|
|
Enable support for Xilinx DMA/Bridge Subsystem DMA engine. The DMA
|
|
provides high performance block data movement between Host memory
|
|
and the DMA subsystem. These direct memory transfers can be both in
|
|
the Host to Card (H2C) and Card to Host (C2H) transfers.
|
|
The core also provides up to 16 user interrupt wires that generate
|
|
interrupts to the host.
|
|
|
|
config XILINX_ZYNQMP_DMA
|
|
tristate "Xilinx ZynqMP DMA Engine"
|
|
depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
|
|
select DMA_ENGINE
|
|
help
|
|
Enable support for Xilinx ZynqMP DMA controller.
|
|
|
|
config XILINX_ZYNQMP_DPDMA
|
|
tristate "Xilinx DPDMA Engine"
|
|
depends on HAS_IOMEM && OF
|
|
select DMA_ENGINE
|
|
select DMA_VIRTUAL_CHANNELS
|
|
help
|
|
Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
|
|
if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
|
|
driver provides the dmaengine required by the DisplayPort subsystem
|
|
display driver.
|
|
|
|
# driver files
|
|
source "drivers/dma/bestcomm/Kconfig"
|
|
|
|
source "drivers/dma/mediatek/Kconfig"
|
|
|
|
source "drivers/dma/ptdma/Kconfig"
|
|
|
|
source "drivers/dma/qcom/Kconfig"
|
|
|
|
source "drivers/dma/dw/Kconfig"
|
|
|
|
source "drivers/dma/dw-edma/Kconfig"
|
|
|
|
source "drivers/dma/hsu/Kconfig"
|
|
|
|
source "drivers/dma/sf-pdma/Kconfig"
|
|
|
|
source "drivers/dma/sh/Kconfig"
|
|
|
|
source "drivers/dma/ti/Kconfig"
|
|
|
|
source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
|
|
|
|
source "drivers/dma/lgm/Kconfig"
|
|
|
|
# clients
|
|
comment "DMA Clients"
|
|
depends on DMA_ENGINE
|
|
|
|
config ASYNC_TX_DMA
|
|
bool "Async_tx: Offload support for the async_tx api"
|
|
depends on DMA_ENGINE
|
|
help
|
|
This allows the async_tx api to take advantage of offload engines for
|
|
memcpy, memset, xor, and raid6 p+q operations. If your platform has
|
|
a dma engine that can perform raid operations and you have enabled
|
|
MD_RAID456 say Y.
|
|
|
|
If unsure, say N.
|
|
|
|
config DMATEST
|
|
tristate "DMA Test client"
|
|
depends on DMA_ENGINE
|
|
select DMA_ENGINE_RAID
|
|
help
|
|
Simple DMA test client. Say N unless you're debugging a
|
|
DMA Device driver.
|
|
|
|
config DMA_ENGINE_RAID
|
|
bool
|
|
|
|
endif
|