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761e784673
Allow in-place crypto operations. Also remove the coherent user flag (we use it automagically now), and by default use the user written key rather then the HW hidden key - this makes crypto just work without any special considerations, and thats OK, since its our only usage model. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
479 lines
11 KiB
C
479 lines
11 KiB
C
/* Copyright (C) 2004-2006, Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/pci_ids.h>
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#include <linux/crypto.h>
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#include <linux/spinlock.h>
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#include <crypto/algapi.h>
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#include <asm/io.h>
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#include <asm/delay.h>
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#include "geode-aes.h"
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/* Register definitions */
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#define AES_CTRLA_REG 0x0000
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#define AES_CTRL_START 0x01
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#define AES_CTRL_DECRYPT 0x00
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#define AES_CTRL_ENCRYPT 0x02
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#define AES_CTRL_WRKEY 0x04
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#define AES_CTRL_DCA 0x08
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#define AES_CTRL_SCA 0x10
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#define AES_CTRL_CBC 0x20
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#define AES_INTR_REG 0x0008
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#define AES_INTRA_PENDING (1 << 16)
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#define AES_INTRB_PENDING (1 << 17)
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#define AES_INTR_PENDING (AES_INTRA_PENDING | AES_INTRB_PENDING)
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#define AES_INTR_MASK 0x07
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#define AES_SOURCEA_REG 0x0010
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#define AES_DSTA_REG 0x0014
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#define AES_LENA_REG 0x0018
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#define AES_WRITEKEY0_REG 0x0030
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#define AES_WRITEIV0_REG 0x0040
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/* A very large counter that is used to gracefully bail out of an
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* operation in case of trouble
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*/
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#define AES_OP_TIMEOUT 0x50000
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/* Static structures */
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static void __iomem * _iobase;
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static spinlock_t lock;
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/* Write a 128 bit field (either a writable key or IV) */
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static inline void
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_writefield(u32 offset, void *value)
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{
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int i;
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for(i = 0; i < 4; i++)
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iowrite32(((u32 *) value)[i], _iobase + offset + (i * 4));
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}
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/* Read a 128 bit field (either a writable key or IV) */
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static inline void
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_readfield(u32 offset, void *value)
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{
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int i;
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for(i = 0; i < 4; i++)
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((u32 *) value)[i] = ioread32(_iobase + offset + (i * 4));
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}
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static int
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do_crypt(void *src, void *dst, int len, u32 flags)
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{
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u32 status;
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u32 counter = AES_OP_TIMEOUT;
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iowrite32(virt_to_phys(src), _iobase + AES_SOURCEA_REG);
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iowrite32(virt_to_phys(dst), _iobase + AES_DSTA_REG);
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iowrite32(len, _iobase + AES_LENA_REG);
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/* Start the operation */
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iowrite32(AES_CTRL_START | flags, _iobase + AES_CTRLA_REG);
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do
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status = ioread32(_iobase + AES_INTR_REG);
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while(!(status & AES_INTRA_PENDING) && --counter);
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/* Clear the event */
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iowrite32((status & 0xFF) | AES_INTRA_PENDING, _iobase + AES_INTR_REG);
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return counter ? 0 : 1;
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}
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static unsigned int
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geode_aes_crypt(struct geode_aes_op *op)
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{
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u32 flags = 0;
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unsigned long iflags;
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if (op->len == 0)
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return 0;
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/* If the source and destination is the same, then
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* we need to turn on the coherent flags, otherwise
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* we don't need to worry
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*/
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if (op->src == op->dst)
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flags |= (AES_CTRL_DCA | AES_CTRL_SCA);
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if (op->dir == AES_DIR_ENCRYPT)
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flags |= AES_CTRL_ENCRYPT;
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/* Start the critical section */
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spin_lock_irqsave(&lock, iflags);
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if (op->mode == AES_MODE_CBC) {
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flags |= AES_CTRL_CBC;
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_writefield(AES_WRITEIV0_REG, op->iv);
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}
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if (!(op->flags & AES_FLAGS_HIDDENKEY)) {
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flags |= AES_CTRL_WRKEY;
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_writefield(AES_WRITEKEY0_REG, op->key);
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}
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do_crypt(op->src, op->dst, op->len, flags);
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if (op->mode == AES_MODE_CBC)
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_readfield(AES_WRITEIV0_REG, op->iv);
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spin_unlock_irqrestore(&lock, iflags);
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return op->len;
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}
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/* CRYPTO-API Functions */
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static int
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geode_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int len)
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{
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struct geode_aes_op *op = crypto_tfm_ctx(tfm);
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if (len != AES_KEY_LENGTH) {
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tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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memcpy(op->key, key, len);
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return 0;
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}
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static void
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geode_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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struct geode_aes_op *op = crypto_tfm_ctx(tfm);
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if ((out == NULL) || (in == NULL))
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return;
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op->src = (void *) in;
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op->dst = (void *) out;
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op->mode = AES_MODE_ECB;
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op->flags = 0;
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op->len = AES_MIN_BLOCK_SIZE;
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op->dir = AES_DIR_ENCRYPT;
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geode_aes_crypt(op);
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}
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static void
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geode_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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struct geode_aes_op *op = crypto_tfm_ctx(tfm);
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if ((out == NULL) || (in == NULL))
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return;
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op->src = (void *) in;
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op->dst = (void *) out;
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op->mode = AES_MODE_ECB;
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op->flags = 0;
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op->len = AES_MIN_BLOCK_SIZE;
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op->dir = AES_DIR_DECRYPT;
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geode_aes_crypt(op);
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}
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static struct crypto_alg geode_alg = {
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.cra_name = "aes",
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.cra_driver_name = "geode-aes-128",
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.cra_priority = 300,
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.cra_alignmask = 15,
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.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
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.cra_blocksize = AES_MIN_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct geode_aes_op),
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(geode_alg.cra_list),
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.cra_u = {
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.cipher = {
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.cia_min_keysize = AES_KEY_LENGTH,
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.cia_max_keysize = AES_KEY_LENGTH,
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.cia_setkey = geode_setkey,
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.cia_encrypt = geode_encrypt,
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.cia_decrypt = geode_decrypt
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}
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}
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};
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static int
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geode_cbc_decrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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int err, ret;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while((nbytes = walk.nbytes)) {
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op->src = walk.src.virt.addr,
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op->dst = walk.dst.virt.addr;
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op->mode = AES_MODE_CBC;
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op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
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op->dir = AES_DIR_DECRYPT;
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memcpy(op->iv, walk.iv, AES_IV_LENGTH);
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ret = geode_aes_crypt(op);
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memcpy(walk.iv, op->iv, AES_IV_LENGTH);
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nbytes -= ret;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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return err;
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}
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static int
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geode_cbc_encrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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int err, ret;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while((nbytes = walk.nbytes)) {
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op->src = walk.src.virt.addr,
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op->dst = walk.dst.virt.addr;
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op->mode = AES_MODE_CBC;
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op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
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op->dir = AES_DIR_ENCRYPT;
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memcpy(op->iv, walk.iv, AES_IV_LENGTH);
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ret = geode_aes_crypt(op);
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nbytes -= ret;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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return err;
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}
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static struct crypto_alg geode_cbc_alg = {
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.cra_name = "cbc(aes)",
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.cra_driver_name = "cbc-aes-geode-128",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_MIN_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct geode_aes_op),
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.cra_alignmask = 15,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(geode_cbc_alg.cra_list),
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_KEY_LENGTH,
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.max_keysize = AES_KEY_LENGTH,
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.setkey = geode_setkey,
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.encrypt = geode_cbc_encrypt,
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.decrypt = geode_cbc_decrypt,
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.ivsize = AES_IV_LENGTH,
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}
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}
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};
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static int
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geode_ecb_decrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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int err, ret;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while((nbytes = walk.nbytes)) {
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op->src = walk.src.virt.addr,
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op->dst = walk.dst.virt.addr;
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op->mode = AES_MODE_ECB;
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op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
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op->dir = AES_DIR_DECRYPT;
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ret = geode_aes_crypt(op);
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nbytes -= ret;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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return err;
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}
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static int
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geode_ecb_encrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct geode_aes_op *op = crypto_blkcipher_ctx(desc->tfm);
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struct blkcipher_walk walk;
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int err, ret;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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while((nbytes = walk.nbytes)) {
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op->src = walk.src.virt.addr,
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op->dst = walk.dst.virt.addr;
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op->mode = AES_MODE_ECB;
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op->len = nbytes - (nbytes % AES_MIN_BLOCK_SIZE);
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op->dir = AES_DIR_ENCRYPT;
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ret = geode_aes_crypt(op);
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nbytes -= ret;
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ret = blkcipher_walk_done(desc, &walk, nbytes);
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}
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return err;
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}
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static struct crypto_alg geode_ecb_alg = {
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.cra_name = "ecb(aes)",
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.cra_driver_name = "ecb-aes-geode-128",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_MIN_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct geode_aes_op),
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.cra_alignmask = 15,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(geode_ecb_alg.cra_list),
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_KEY_LENGTH,
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.max_keysize = AES_KEY_LENGTH,
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.setkey = geode_setkey,
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.encrypt = geode_ecb_encrypt,
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.decrypt = geode_ecb_decrypt,
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}
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}
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};
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static void
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geode_aes_remove(struct pci_dev *dev)
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{
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crypto_unregister_alg(&geode_alg);
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crypto_unregister_alg(&geode_ecb_alg);
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crypto_unregister_alg(&geode_cbc_alg);
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pci_iounmap(dev, _iobase);
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_iobase = NULL;
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pci_release_regions(dev);
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pci_disable_device(dev);
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}
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static int
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geode_aes_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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int ret;
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if ((ret = pci_enable_device(dev)))
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return ret;
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if ((ret = pci_request_regions(dev, "geode-aes-128")))
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goto eenable;
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_iobase = pci_iomap(dev, 0, 0);
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if (_iobase == NULL) {
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ret = -ENOMEM;
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goto erequest;
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}
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spin_lock_init(&lock);
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/* Clear any pending activity */
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iowrite32(AES_INTR_PENDING | AES_INTR_MASK, _iobase + AES_INTR_REG);
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if ((ret = crypto_register_alg(&geode_alg)))
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goto eiomap;
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if ((ret = crypto_register_alg(&geode_ecb_alg)))
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goto ealg;
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if ((ret = crypto_register_alg(&geode_cbc_alg)))
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goto eecb;
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printk(KERN_NOTICE "geode-aes: GEODE AES engine enabled.\n");
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return 0;
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eecb:
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crypto_unregister_alg(&geode_ecb_alg);
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ealg:
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crypto_unregister_alg(&geode_alg);
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eiomap:
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pci_iounmap(dev, _iobase);
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erequest:
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pci_release_regions(dev);
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eenable:
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pci_disable_device(dev);
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printk(KERN_ERR "geode-aes: GEODE AES initialization failed.\n");
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return ret;
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}
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static struct pci_device_id geode_aes_tbl[] = {
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LX_AES, PCI_ANY_ID, PCI_ANY_ID} ,
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, geode_aes_tbl);
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static struct pci_driver geode_aes_driver = {
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.name = "Geode LX AES",
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.id_table = geode_aes_tbl,
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.probe = geode_aes_probe,
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.remove = __devexit_p(geode_aes_remove)
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};
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static int __init
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geode_aes_init(void)
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{
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return pci_register_driver(&geode_aes_driver);
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}
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static void __exit
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geode_aes_exit(void)
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{
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pci_unregister_driver(&geode_aes_driver);
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}
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MODULE_AUTHOR("Advanced Micro Devices, Inc.");
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MODULE_DESCRIPTION("Geode LX Hardware AES driver");
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MODULE_LICENSE("GPL");
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module_init(geode_aes_init);
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module_exit(geode_aes_exit);
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