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This consolidates the CLCD panel definitions and memory allocation into one location. Rename the Sanyo 2.5in and Epson 2.2in displays after their respective part numbers. Rather than using a general "Sanyo 2.5in" and "Epson 2.2in" description of the display panel, use the manufacturers part number to be more specific. This helps people identify what the timings actually refer to, which are panel specific. While here, add CLCD capability information to each panel definition, which has no effect until we add the board-level capabilities. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
183 lines
3.9 KiB
C
183 lines
3.9 KiB
C
#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/clcd.h>
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#include <plat/clcd.h>
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static struct clcd_panel vga = {
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.mode = {
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.name = "VGA",
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.refresh = 60,
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.xres = 640,
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.yres = 480,
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.pixclock = 39721,
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.left_margin = 40,
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.right_margin = 24,
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.upper_margin = 32,
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.lower_margin = 11,
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.hsync_len = 96,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
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.bpp = 16,
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};
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static struct clcd_panel xvga = {
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.mode = {
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.name = "XVGA",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15748,
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.left_margin = 152,
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.right_margin = 48,
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.upper_margin = 23,
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.lower_margin = 3,
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.hsync_len = 104,
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.vsync_len = 4,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.caps = CLCD_CAP_5551 | CLCD_CAP_565 | CLCD_CAP_888,
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.bpp = 16,
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};
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/* Sanyo TM38QV67A02A - 3.8 inch QVGA (320x240) Color TFT */
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static struct clcd_panel sanyo_tm38qv67a02a = {
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.mode = {
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.name = "Sanyo TM38QV67A02A",
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.refresh = 116,
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.xres = 320,
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.yres = 240,
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.pixclock = 100000,
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.left_margin = 6,
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.right_margin = 6,
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.upper_margin = 5,
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.lower_margin = 5,
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.hsync_len = 6,
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.vsync_len = 6,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.caps = CLCD_CAP_5551,
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.bpp = 16,
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};
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static struct clcd_panel sanyo_2_5_in = {
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.mode = {
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.name = "Sanyo QVGA Portrait",
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.refresh = 116,
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.xres = 240,
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.yres = 320,
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.pixclock = 100000,
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.left_margin = 20,
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.right_margin = 10,
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.upper_margin = 2,
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.lower_margin = 2,
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.hsync_len = 10,
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.vsync_len = 2,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.caps = CLCD_CAP_5551,
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.bpp = 16,
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};
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/* Epson L2F50113T00 - 2.2 inch 176x220 Color TFT */
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static struct clcd_panel epson_l2f50113t00 = {
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.mode = {
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.name = "Epson L2F50113T00",
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.refresh = 390,
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.xres = 176,
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.yres = 220,
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.pixclock = 62500,
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.left_margin = 3,
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.right_margin = 2,
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.upper_margin = 1,
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.lower_margin = 0,
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.hsync_len = 3,
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.vsync_len = 2,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.caps = CLCD_CAP_5551,
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.bpp = 16,
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};
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static struct clcd_panel *panels[] = {
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&vga,
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&xvga,
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&sanyo_tm38qv67a02a,
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&sanyo_2_5_in,
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&epson_l2f50113t00,
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};
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struct clcd_panel *versatile_clcd_get_panel(const char *name)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(panels); i++)
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if (strcmp(panels[i]->mode.name, name) == 0)
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break;
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if (i < ARRAY_SIZE(panels))
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return panels[i];
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pr_err("CLCD: couldn't get parameters for panel %s\n", name);
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return NULL;
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}
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int versatile_clcd_setup_dma(struct clcd_fb *fb, unsigned long framesize)
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{
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dma_addr_t dma;
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fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
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&dma, GFP_KERNEL);
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if (!fb->fb.screen_base) {
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pr_err("CLCD: unable to map framebuffer\n");
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return -ENOMEM;
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}
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fb->fb.fix.smem_start = dma;
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fb->fb.fix.smem_len = framesize;
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return 0;
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}
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int versatile_clcd_mmap_dma(struct clcd_fb *fb, struct vm_area_struct *vma)
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{
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return dma_mmap_writecombine(&fb->dev->dev, vma,
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fb->fb.screen_base,
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fb->fb.fix.smem_start,
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fb->fb.fix.smem_len);
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}
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void versatile_clcd_remove_dma(struct clcd_fb *fb)
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{
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dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
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fb->fb.screen_base, fb->fb.fix.smem_start);
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}
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