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b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
384 lines
11 KiB
C
384 lines
11 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Marvell camera core structures.
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*
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* Copyright 2011 Jonathan Corbet corbet@lwn.net
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*/
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#ifndef _MCAM_CORE_H
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#define _MCAM_CORE_H
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#include <linux/list.h>
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#include <media/v4l2-common.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-dev.h>
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#include <media/videobuf2-v4l2.h>
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/*
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* Create our own symbols for the supported buffer modes, but, for now,
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* base them entirely on which videobuf2 options have been selected.
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*/
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#if IS_ENABLED(CONFIG_VIDEOBUF2_VMALLOC)
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#define MCAM_MODE_VMALLOC 1
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#endif
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#if IS_ENABLED(CONFIG_VIDEOBUF2_DMA_CONTIG)
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#define MCAM_MODE_DMA_CONTIG 1
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#endif
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#if IS_ENABLED(CONFIG_VIDEOBUF2_DMA_SG)
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#define MCAM_MODE_DMA_SG 1
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#endif
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#if !defined(MCAM_MODE_VMALLOC) && !defined(MCAM_MODE_DMA_CONTIG) && \
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!defined(MCAM_MODE_DMA_SG)
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#error One of the videobuf buffer modes must be selected in the config
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#endif
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enum mcam_state {
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S_NOTREADY, /* Not yet initialized */
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S_IDLE, /* Just hanging around */
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S_FLAKED, /* Some sort of problem */
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S_STREAMING, /* Streaming data */
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S_BUFWAIT /* streaming requested but no buffers yet */
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};
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#define MAX_DMA_BUFS 3
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/*
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* Different platforms work best with different buffer modes, so we
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* let the platform pick.
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*/
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enum mcam_buffer_mode {
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B_vmalloc = 0,
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B_DMA_contig = 1,
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B_DMA_sg = 2
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};
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enum mcam_chip_id {
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MCAM_CAFE,
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MCAM_ARMADA610,
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};
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/*
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* Is a given buffer mode supported by the current kernel configuration?
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*/
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static inline int mcam_buffer_mode_supported(enum mcam_buffer_mode mode)
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{
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switch (mode) {
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#ifdef MCAM_MODE_VMALLOC
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case B_vmalloc:
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#endif
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#ifdef MCAM_MODE_DMA_CONTIG
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case B_DMA_contig:
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#endif
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#ifdef MCAM_MODE_DMA_SG
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case B_DMA_sg:
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#endif
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return 1;
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default:
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return 0;
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}
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}
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/*
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* Basic frame states
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*/
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struct mcam_frame_state {
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unsigned int frames;
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unsigned int singles;
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unsigned int delivered;
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};
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#define NR_MCAM_CLK 3
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/*
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* A description of one of our devices.
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* Locking: controlled by s_mutex. Certain fields, however, require
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* the dev_lock spinlock; they are marked as such by comments.
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* dev_lock is also required for access to device registers.
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*/
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struct mcam_camera {
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/*
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* These fields should be set by the platform code prior to
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* calling mcam_register().
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*/
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struct i2c_adapter *i2c_adapter;
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unsigned char __iomem *regs;
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unsigned regs_size; /* size in bytes of the register space */
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spinlock_t dev_lock;
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struct device *dev; /* For messages, dma alloc */
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enum mcam_chip_id chip_id;
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short int clock_speed; /* Sensor clock speed, default 30 */
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short int use_smbus; /* SMBUS or straight I2c? */
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enum mcam_buffer_mode buffer_mode;
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int mclk_min; /* The minimal value of mclk */
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int mclk_src; /* which clock source the mclk derives from */
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int mclk_div; /* Clock Divider Value for MCLK */
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int ccic_id;
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enum v4l2_mbus_type bus_type;
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/* MIPI support */
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/* The dphy config value, allocated in board file
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* dphy[0]: DPHY3
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* dphy[1]: DPHY5
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* dphy[2]: DPHY6
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*/
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int *dphy;
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bool mipi_enabled; /* flag whether mipi is enabled already */
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int lane; /* lane number */
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/* clock tree support */
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struct clk *clk[NR_MCAM_CLK];
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/*
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* Callbacks from the core to the platform code.
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*/
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int (*plat_power_up) (struct mcam_camera *cam);
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void (*plat_power_down) (struct mcam_camera *cam);
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void (*calc_dphy) (struct mcam_camera *cam);
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void (*ctlr_reset) (struct mcam_camera *cam);
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/*
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* Everything below here is private to the mcam core and
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* should not be touched by the platform code.
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*/
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struct v4l2_device v4l2_dev;
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struct v4l2_ctrl_handler ctrl_handler;
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enum mcam_state state;
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unsigned long flags; /* Buffer status, mainly (dev_lock) */
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struct mcam_frame_state frame_state; /* Frame state counter */
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/*
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* Subsystem structures.
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*/
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struct video_device vdev;
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struct v4l2_subdev *sensor;
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unsigned short sensor_addr;
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/* Videobuf2 stuff */
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struct vb2_queue vb_queue;
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struct list_head buffers; /* Available frames */
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unsigned int nbufs; /* How many are alloc'd */
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int next_buf; /* Next to consume (dev_lock) */
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char bus_info[32]; /* querycap bus_info */
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/* DMA buffers - vmalloc mode */
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#ifdef MCAM_MODE_VMALLOC
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unsigned int dma_buf_size; /* allocated size */
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void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */
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dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */
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struct tasklet_struct s_tasklet;
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#endif
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unsigned int sequence; /* Frame sequence number */
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unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual bufs */
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/* DMA buffers - DMA modes */
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struct mcam_vb_buffer *vb_bufs[MAX_DMA_BUFS];
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/* Mode-specific ops, set at open time */
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void (*dma_setup)(struct mcam_camera *cam);
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void (*frame_complete)(struct mcam_camera *cam, int frame);
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/* Current operating parameters */
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struct v4l2_pix_format pix_format;
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u32 mbus_code;
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/* Locks */
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struct mutex s_mutex; /* Access to this structure */
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};
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/*
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* Register I/O functions. These are here because the platform code
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* may legitimately need to mess with the register space.
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*/
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/*
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* Device register I/O
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*/
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static inline void mcam_reg_write(struct mcam_camera *cam, unsigned int reg,
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unsigned int val)
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{
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iowrite32(val, cam->regs + reg);
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}
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static inline unsigned int mcam_reg_read(struct mcam_camera *cam,
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unsigned int reg)
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{
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return ioread32(cam->regs + reg);
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}
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static inline void mcam_reg_write_mask(struct mcam_camera *cam, unsigned int reg,
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unsigned int val, unsigned int mask)
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{
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unsigned int v = mcam_reg_read(cam, reg);
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v = (v & ~mask) | (val & mask);
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mcam_reg_write(cam, reg, v);
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}
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static inline void mcam_reg_clear_bit(struct mcam_camera *cam,
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unsigned int reg, unsigned int val)
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{
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mcam_reg_write_mask(cam, reg, 0, val);
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}
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static inline void mcam_reg_set_bit(struct mcam_camera *cam,
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unsigned int reg, unsigned int val)
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{
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mcam_reg_write_mask(cam, reg, val, val);
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}
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/*
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* Functions for use by platform code.
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*/
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int mccic_register(struct mcam_camera *cam);
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int mccic_irq(struct mcam_camera *cam, unsigned int irqs);
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void mccic_shutdown(struct mcam_camera *cam);
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#ifdef CONFIG_PM
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void mccic_suspend(struct mcam_camera *cam);
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int mccic_resume(struct mcam_camera *cam);
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#endif
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/*
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* Register definitions for the m88alp01 camera interface. Offsets in bytes
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* as given in the spec.
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*/
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#define REG_Y0BAR 0x00
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#define REG_Y1BAR 0x04
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#define REG_Y2BAR 0x08
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#define REG_U0BAR 0x0c
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#define REG_U1BAR 0x10
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#define REG_U2BAR 0x14
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#define REG_V0BAR 0x18
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#define REG_V1BAR 0x1C
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#define REG_V2BAR 0x20
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/*
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* register definitions for MIPI support
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*/
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#define REG_CSI2_CTRL0 0x100
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#define CSI2_C0_MIPI_EN (0x1 << 0)
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#define CSI2_C0_ACT_LANE(n) ((n-1) << 1)
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#define REG_CSI2_DPHY3 0x12c
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#define REG_CSI2_DPHY5 0x134
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#define REG_CSI2_DPHY6 0x138
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/* ... */
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#define REG_IMGPITCH 0x24 /* Image pitch register */
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#define IMGP_YP_SHFT 2 /* Y pitch params */
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#define IMGP_YP_MASK 0x00003ffc /* Y pitch field */
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#define IMGP_UVP_SHFT 18 /* UV pitch (planar) */
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#define IMGP_UVP_MASK 0x3ffc0000
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#define REG_IRQSTATRAW 0x28 /* RAW IRQ Status */
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#define IRQ_EOF0 0x00000001 /* End of frame 0 */
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#define IRQ_EOF1 0x00000002 /* End of frame 1 */
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#define IRQ_EOF2 0x00000004 /* End of frame 2 */
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#define IRQ_SOF0 0x00000008 /* Start of frame 0 */
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#define IRQ_SOF1 0x00000010 /* Start of frame 1 */
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#define IRQ_SOF2 0x00000020 /* Start of frame 2 */
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#define IRQ_OVERFLOW 0x00000040 /* FIFO overflow */
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#define IRQ_TWSIW 0x00010000 /* TWSI (smbus) write */
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#define IRQ_TWSIR 0x00020000 /* TWSI read */
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#define IRQ_TWSIE 0x00040000 /* TWSI error */
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#define TWSIIRQS (IRQ_TWSIW|IRQ_TWSIR|IRQ_TWSIE)
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#define FRAMEIRQS (IRQ_EOF0|IRQ_EOF1|IRQ_EOF2|IRQ_SOF0|IRQ_SOF1|IRQ_SOF2)
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#define ALLIRQS (TWSIIRQS|FRAMEIRQS|IRQ_OVERFLOW)
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#define REG_IRQMASK 0x2c /* IRQ mask - same bits as IRQSTAT */
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#define REG_IRQSTAT 0x30 /* IRQ status / clear */
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#define REG_IMGSIZE 0x34 /* Image size */
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#define IMGSZ_V_MASK 0x1fff0000
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#define IMGSZ_V_SHIFT 16
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#define IMGSZ_H_MASK 0x00003fff
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#define REG_IMGOFFSET 0x38 /* IMage offset */
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#define REG_CTRL0 0x3c /* Control 0 */
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#define C0_ENABLE 0x00000001 /* Makes the whole thing go */
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/* Mask for all the format bits */
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#define C0_DF_MASK 0x00fffffc /* Bits 2-23 */
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/* RGB ordering */
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#define C0_RGB4_RGBX 0x00000000
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#define C0_RGB4_XRGB 0x00000004
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#define C0_RGB4_BGRX 0x00000008
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#define C0_RGB4_XBGR 0x0000000c
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#define C0_RGB5_RGGB 0x00000000
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#define C0_RGB5_GRBG 0x00000004
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#define C0_RGB5_GBRG 0x00000008
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#define C0_RGB5_BGGR 0x0000000c
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/* Spec has two fields for DIN and DOUT, but they must match, so
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combine them here. */
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#define C0_DF_YUV 0x00000000 /* Data is YUV */
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#define C0_DF_RGB 0x000000a0 /* ... RGB */
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#define C0_DF_BAYER 0x00000140 /* ... Bayer */
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/* 8-8-8 must be missing from the below - ask */
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#define C0_RGBF_565 0x00000000
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#define C0_RGBF_444 0x00000800
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#define C0_RGB_BGR 0x00001000 /* Blue comes first */
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#define C0_YUV_PLANAR 0x00000000 /* YUV 422 planar format */
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#define C0_YUV_PACKED 0x00008000 /* YUV 422 packed */
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#define C0_YUV_420PL 0x0000a000 /* YUV 420 planar */
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/* Think that 420 packed must be 111 - ask */
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#define C0_YUVE_YUYV 0x00000000 /* Y1CbY0Cr */
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#define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */
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#define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */
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#define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */
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#define C0_YUVE_NOSWAP 0x00000000 /* no bytes swapping */
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#define C0_YUVE_SWAP13 0x00010000 /* swap byte 1 and 3 */
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#define C0_YUVE_SWAP24 0x00020000 /* swap byte 2 and 4 */
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#define C0_YUVE_SWAP1324 0x00030000 /* swap bytes 1&3 and 2&4 */
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/* Bayer bits 18,19 if needed */
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#define C0_EOF_VSYNC 0x00400000 /* Generate EOF by VSYNC */
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#define C0_VEDGE_CTRL 0x00800000 /* Detect falling edge of VSYNC */
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#define C0_HPOL_LOW 0x01000000 /* HSYNC polarity active low */
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#define C0_VPOL_LOW 0x02000000 /* VSYNC polarity active low */
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#define C0_VCLK_LOW 0x04000000 /* VCLK on falling edge */
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#define C0_DOWNSCALE 0x08000000 /* Enable downscaler */
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/* SIFMODE */
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#define C0_SIF_HVSYNC 0x00000000 /* Use H/VSYNC */
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#define C0_SOF_NOSYNC 0x40000000 /* Use inband active signaling */
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#define C0_SIFM_MASK 0xc0000000 /* SIF mode bits */
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/* Bits below C1_444ALPHA are not present in Cafe */
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#define REG_CTRL1 0x40 /* Control 1 */
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#define C1_CLKGATE 0x00000001 /* Sensor clock gate */
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#define C1_DESC_ENA 0x00000100 /* DMA descriptor enable */
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#define C1_DESC_3WORD 0x00000200 /* Three-word descriptors used */
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#define C1_444ALPHA 0x00f00000 /* Alpha field in RGB444 */
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#define C1_ALPHA_SHFT 20
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#define C1_DMAB32 0x00000000 /* 32-byte DMA burst */
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#define C1_DMAB16 0x02000000 /* 16-byte DMA burst */
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#define C1_DMAB64 0x04000000 /* 64-byte DMA burst */
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#define C1_DMAB_MASK 0x06000000
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#define C1_TWOBUFS 0x08000000 /* Use only two DMA buffers */
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#define C1_PWRDWN 0x10000000 /* Power down */
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#define REG_CLKCTRL 0x88 /* Clock control */
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#define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */
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/* This appears to be a Cafe-only register */
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#define REG_UBAR 0xc4 /* Upper base address register */
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/* Armada 610 DMA descriptor registers */
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#define REG_DMA_DESC_Y 0x200
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#define REG_DMA_DESC_U 0x204
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#define REG_DMA_DESC_V 0x208
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#define REG_DESC_LEN_Y 0x20c /* Lengths are in bytes */
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#define REG_DESC_LEN_U 0x210
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#define REG_DESC_LEN_V 0x214
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/*
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* Useful stuff that probably belongs somewhere global.
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*/
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#define VGA_WIDTH 640
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#define VGA_HEIGHT 480
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#endif /* _MCAM_CORE_H */
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