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The SDHCI unit used on the Armada 380 and 385 Marvell SoC is similar to the PXAv3 unit. The only difference is that on Armada 38x, the PXAv3 unit accesses memory through MBus windows which must be configured prior to using the device. Without this, DMA would not work. In order to achieve this, the sdhci-pxav3 driver is extended with an additional compatible string "marvell,armada-380-sdhci". When this compatible string is used, the MBus windows are initialized in a way that is identical to what all other DMA-capable drivers for Marvell EBU platforms do. Signed-off-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Chris Ball <chris@printf.net>
37 lines
1.0 KiB
Plaintext
37 lines
1.0 KiB
Plaintext
* Marvell sdhci-pxa v2/v3 controller
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This file documents differences between the core properties in mmc.txt
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and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.
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Required properties:
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- compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or
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"marvell,armada-380-sdhci".
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- reg:
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* for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for
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the SDHCI registers.
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* for "marvell,armada-380-sdhci", two register areas. The first one
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for the SDHCI registers themselves, and the second one for the
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AXI/Mbus bridge registers of the SDHCI unit.
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Optional properties:
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- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
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Example:
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sdhci@d4280800 {
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compatible = "mrvl,pxav3-mmc";
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reg = <0xd4280800 0x800>;
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bus-width = <8>;
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interrupts = <27>;
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non-removable;
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mrvl,clk-delay-cycles = <31>;
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};
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sdhci@d8000 {
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compatible = "marvell,armada-380-sdhci";
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reg = <0xd8000 0x1000>, <0xdc000 0x100>;
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interrupts = <0 25 0x4>;
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clocks = <&gateclk 17>;
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mrvl,clk-delay-cycles = <0x1F>;
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};
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