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We extend the existing RISC-V SBI earlycon support to use the new RISC-V SBI debug console extension. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20231124070905.1043092-4-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
53 lines
1.1 KiB
C
53 lines
1.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* RISC-V SBI based earlycon
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*
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* Copyright (C) 2018 Anup Patel <anup@brainfault.org>
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*/
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#include <linux/kernel.h>
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#include <linux/console.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <asm/sbi.h>
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static void sbi_putc(struct uart_port *port, unsigned char c)
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{
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sbi_console_putchar(c);
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}
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static void sbi_0_1_console_write(struct console *con,
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const char *s, unsigned int n)
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{
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struct earlycon_device *dev = con->data;
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uart_console_write(&dev->port, s, n, sbi_putc);
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}
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static void sbi_dbcn_console_write(struct console *con,
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const char *s, unsigned int n)
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{
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int ret;
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while (n) {
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ret = sbi_debug_console_write(s, n);
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if (ret < 0)
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break;
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s += ret;
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n -= ret;
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}
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}
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static int __init early_sbi_setup(struct earlycon_device *device,
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const char *opt)
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{
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if (sbi_debug_console_available)
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device->con->write = sbi_dbcn_console_write;
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else if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
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device->con->write = sbi_0_1_console_write;
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else
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return -ENODEV;
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return 0;
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}
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EARLYCON_DECLARE(sbi, early_sbi_setup);
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