mirror of
https://github.com/torvalds/linux.git
synced 2024-11-15 00:21:59 +00:00
a948396981
To prepare pin-controller consolidation, first rename all pinctrl nodes to a more appropriate name regarding ePAPR recommended names. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-6-git-send-email-sebastian.hesselbarth@gmail.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
154 lines
2.3 KiB
Plaintext
154 lines
2.3 KiB
Plaintext
/*
|
|
* Marvell RD88F6181 Common Board descrition
|
|
*
|
|
* Andrew Lunn <andrew@lunn.ch>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*
|
|
* This file contains the definitions that are common between the two
|
|
* variants of the Marvell Kirkwood Development Board.
|
|
*/
|
|
|
|
#include "kirkwood.dtsi"
|
|
#include "kirkwood-6281.dtsi"
|
|
|
|
/ {
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x20000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200n8";
|
|
stdout-path = &uart0;
|
|
};
|
|
|
|
mbus {
|
|
pcie-controller {
|
|
status = "okay";
|
|
|
|
pcie@1,0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
|
|
ocp@f1000000 {
|
|
pinctrl: pin-controller@10000 {
|
|
pinctrl-0 = <&pmx_sdio_cd>;
|
|
pinctrl-names = "default";
|
|
|
|
pmx_sdio_cd: pmx-sdio-cd {
|
|
marvell,pins = "mpp28";
|
|
marvell,function = "gpio";
|
|
};
|
|
};
|
|
|
|
serial@12000 {
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
sata@80000 {
|
|
status = "okay";
|
|
nr-ports = <2>;
|
|
};
|
|
mvsdio@90000 {
|
|
pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
cd-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
|
|
/* No WP GPIO */
|
|
};
|
|
};
|
|
|
|
dsa@0 {
|
|
compatible = "marvell,dsa";
|
|
#address-cells = <2>;
|
|
#size-cells = <0>;
|
|
|
|
dsa,ethernet = <ð0>;
|
|
dsa,mii-bus = <ðphy1>;
|
|
|
|
switch@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
label = "lan1";
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
label = "lan2";
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
label = "lan3";
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
label = "lan4";
|
|
};
|
|
|
|
port@5 {
|
|
reg = <5>;
|
|
label = "cpu";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&nand {
|
|
status = "okay";
|
|
|
|
partition@0 {
|
|
label = "u-boot";
|
|
reg = <0x0000000 0x100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "uImage";
|
|
reg = <0x0100000 0x200000>;
|
|
};
|
|
|
|
partition@300000 {
|
|
label = "data";
|
|
reg = <0x0300000 0x500000>;
|
|
};
|
|
};
|
|
|
|
&mdio {
|
|
status = "okay";
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
|
|
ethphy1: ethernet-phy@ff {
|
|
reg = <0xff>; /* No PHY attached */
|
|
speed = <1000>;
|
|
duple = <1>;
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
ethernet0-port@0 {
|
|
phy-handle = <ðphy0>;
|
|
};
|
|
};
|
|
|
|
ð1 {
|
|
status = "okay";
|
|
ethernet1-port@0 {
|
|
phy-handle = <ðphy1>;
|
|
};
|
|
};
|