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55009c6ed2
We currently intertwine the KVM PSCI implementation with the general dispatch of hypercall handling, which makes perfect sense because PSCI is the only category of hypercalls we support. However, as we are about to support additional hypercalls, factor out this functionality into a separate hypercall handler file. Signed-off-by: Christoffer Dall <christoffer.dall@arm.com> [steven.price@arm.com: rebased] Reviewed-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Steven Price <steven.price@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org>
338 lines
8.9 KiB
C
338 lines
8.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Derived from arch/arm/kvm/handle_exit.c:
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Author: Christoffer Dall <c.dall@virtualopensystems.com>
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <asm/esr.h>
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#include <asm/exception.h>
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#include <asm/kvm_asm.h>
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#include <asm/kvm_coproc.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_mmu.h>
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#include <asm/debug-monitors.h>
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#include <asm/traps.h>
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#include <kvm/arm_hypercalls.h>
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#define CREATE_TRACE_POINTS
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#include "trace.h"
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typedef int (*exit_handle_fn)(struct kvm_vcpu *, struct kvm_run *);
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static void kvm_handle_guest_serror(struct kvm_vcpu *vcpu, u32 esr)
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{
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if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr))
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kvm_inject_vabt(vcpu);
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}
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static int handle_hvc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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int ret;
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trace_kvm_hvc_arm64(*vcpu_pc(vcpu), vcpu_get_reg(vcpu, 0),
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kvm_vcpu_hvc_get_imm(vcpu));
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vcpu->stat.hvc_exit_stat++;
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ret = kvm_hvc_call_handler(vcpu);
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if (ret < 0) {
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vcpu_set_reg(vcpu, 0, ~0UL);
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return 1;
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}
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return ret;
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}
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static int handle_smc(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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/*
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* "If an SMC instruction executed at Non-secure EL1 is
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* trapped to EL2 because HCR_EL2.TSC is 1, the exception is a
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* Trap exception, not a Secure Monitor Call exception [...]"
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*
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* We need to advance the PC after the trap, as it would
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* otherwise return to the same address...
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*/
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vcpu_set_reg(vcpu, 0, ~0UL);
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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/*
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* Guest access to FP/ASIMD registers are routed to this handler only
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* when the system doesn't support FP/ASIMD.
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*/
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static int handle_no_fpsimd(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_inject_undefined(vcpu);
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return 1;
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}
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/**
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* kvm_handle_wfx - handle a wait-for-interrupts or wait-for-event
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* instruction executed by a guest
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*
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* @vcpu: the vcpu pointer
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*
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* WFE: Yield the CPU and come back to this vcpu when the scheduler
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* decides to.
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* WFI: Simply call kvm_vcpu_block(), which will halt execution of
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* world-switches and schedule other host processes until there is an
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* incoming IRQ or FIQ to the VM.
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*/
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static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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if (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WFx_ISS_WFE) {
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trace_kvm_wfx_arm64(*vcpu_pc(vcpu), true);
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vcpu->stat.wfe_exit_stat++;
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kvm_vcpu_on_spin(vcpu, vcpu_mode_priv(vcpu));
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} else {
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trace_kvm_wfx_arm64(*vcpu_pc(vcpu), false);
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vcpu->stat.wfi_exit_stat++;
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kvm_vcpu_block(vcpu);
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kvm_clear_request(KVM_REQ_UNHALT, vcpu);
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}
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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return 1;
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}
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/**
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* kvm_handle_guest_debug - handle a debug exception instruction
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*
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* @vcpu: the vcpu pointer
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* @run: access to the kvm_run structure for results
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*
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* We route all debug exceptions through the same handler. If both the
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* guest and host are using the same debug facilities it will be up to
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* userspace to re-inject the correct exception for guest delivery.
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*
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* @return: 0 (while setting run->exit_reason), -1 for error
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*/
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static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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int ret = 0;
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run->exit_reason = KVM_EXIT_DEBUG;
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run->debug.arch.hsr = hsr;
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switch (ESR_ELx_EC(hsr)) {
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case ESR_ELx_EC_WATCHPT_LOW:
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run->debug.arch.far = vcpu->arch.fault.far_el2;
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/* fall through */
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case ESR_ELx_EC_SOFTSTP_LOW:
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case ESR_ELx_EC_BREAKPT_LOW:
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case ESR_ELx_EC_BKPT32:
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case ESR_ELx_EC_BRK64:
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break;
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default:
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kvm_err("%s: un-handled case hsr: %#08x\n",
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__func__, (unsigned int) hsr);
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ret = -1;
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break;
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}
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return ret;
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}
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static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n",
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hsr, esr_get_class_string(hsr));
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kvm_inject_undefined(vcpu);
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return 1;
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}
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static int handle_sve(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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/* Until SVE is supported for guests: */
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kvm_inject_undefined(vcpu);
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return 1;
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}
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#define __ptrauth_save_key(regs, key) \
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({ \
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regs[key ## KEYLO_EL1] = read_sysreg_s(SYS_ ## key ## KEYLO_EL1); \
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regs[key ## KEYHI_EL1] = read_sysreg_s(SYS_ ## key ## KEYHI_EL1); \
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})
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/*
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* Handle the guest trying to use a ptrauth instruction, or trying to access a
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* ptrauth register.
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*/
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void kvm_arm_vcpu_ptrauth_trap(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpu_context *ctxt;
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if (vcpu_has_ptrauth(vcpu)) {
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vcpu_ptrauth_enable(vcpu);
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ctxt = vcpu->arch.host_cpu_context;
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__ptrauth_save_key(ctxt->sys_regs, APIA);
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__ptrauth_save_key(ctxt->sys_regs, APIB);
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__ptrauth_save_key(ctxt->sys_regs, APDA);
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__ptrauth_save_key(ctxt->sys_regs, APDB);
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__ptrauth_save_key(ctxt->sys_regs, APGA);
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} else {
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kvm_inject_undefined(vcpu);
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}
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}
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/*
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* Guest usage of a ptrauth instruction (which the guest EL1 did not turn into
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* a NOP).
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*/
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static int kvm_handle_ptrauth(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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kvm_arm_vcpu_ptrauth_trap(vcpu);
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return 1;
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}
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static exit_handle_fn arm_exit_handlers[] = {
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[0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
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[ESR_ELx_EC_WFx] = kvm_handle_wfx,
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[ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32,
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[ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64,
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[ESR_ELx_EC_CP14_MR] = kvm_handle_cp14_32,
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[ESR_ELx_EC_CP14_LS] = kvm_handle_cp14_load_store,
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[ESR_ELx_EC_CP14_64] = kvm_handle_cp14_64,
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[ESR_ELx_EC_HVC32] = handle_hvc,
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[ESR_ELx_EC_SMC32] = handle_smc,
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[ESR_ELx_EC_HVC64] = handle_hvc,
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[ESR_ELx_EC_SMC64] = handle_smc,
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[ESR_ELx_EC_SYS64] = kvm_handle_sys_reg,
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[ESR_ELx_EC_SVE] = handle_sve,
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[ESR_ELx_EC_IABT_LOW] = kvm_handle_guest_abort,
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[ESR_ELx_EC_DABT_LOW] = kvm_handle_guest_abort,
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[ESR_ELx_EC_SOFTSTP_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_WATCHPT_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_BREAKPT_LOW]= kvm_handle_guest_debug,
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[ESR_ELx_EC_BKPT32] = kvm_handle_guest_debug,
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[ESR_ELx_EC_BRK64] = kvm_handle_guest_debug,
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[ESR_ELx_EC_FP_ASIMD] = handle_no_fpsimd,
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[ESR_ELx_EC_PAC] = kvm_handle_ptrauth,
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};
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static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
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{
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u32 hsr = kvm_vcpu_get_hsr(vcpu);
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u8 hsr_ec = ESR_ELx_EC(hsr);
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return arm_exit_handlers[hsr_ec];
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}
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/*
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* We may be single-stepping an emulated instruction. If the emulation
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* has been completed in the kernel, we can return to userspace with a
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* KVM_EXIT_DEBUG, otherwise userspace needs to complete its
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* emulation first.
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*/
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static int handle_trap_exceptions(struct kvm_vcpu *vcpu, struct kvm_run *run)
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{
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int handled;
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/*
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* See ARM ARM B1.14.1: "Hyp traps on instructions
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* that fail their condition code check"
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*/
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if (!kvm_condition_valid(vcpu)) {
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kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
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handled = 1;
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} else {
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exit_handle_fn exit_handler;
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exit_handler = kvm_get_exit_handler(vcpu);
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handled = exit_handler(vcpu, run);
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}
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return handled;
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}
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/*
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* Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
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* proper exit to userspace.
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*/
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int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
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int exception_index)
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{
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if (ARM_SERROR_PENDING(exception_index)) {
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u8 hsr_ec = ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu));
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/*
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* HVC/SMC already have an adjusted PC, which we need
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* to correct in order to return to after having
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* injected the SError.
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*/
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if (hsr_ec == ESR_ELx_EC_HVC32 || hsr_ec == ESR_ELx_EC_HVC64 ||
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hsr_ec == ESR_ELx_EC_SMC32 || hsr_ec == ESR_ELx_EC_SMC64) {
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u32 adj = kvm_vcpu_trap_il_is32bit(vcpu) ? 4 : 2;
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*vcpu_pc(vcpu) -= adj;
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}
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return 1;
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}
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exception_index = ARM_EXCEPTION_CODE(exception_index);
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switch (exception_index) {
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case ARM_EXCEPTION_IRQ:
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return 1;
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case ARM_EXCEPTION_EL1_SERROR:
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return 1;
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case ARM_EXCEPTION_TRAP:
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return handle_trap_exceptions(vcpu, run);
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case ARM_EXCEPTION_HYP_GONE:
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/*
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* EL2 has been reset to the hyp-stub. This happens when a guest
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* is pre-empted by kvm_reboot()'s shutdown call.
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*/
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run->exit_reason = KVM_EXIT_FAIL_ENTRY;
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return 0;
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case ARM_EXCEPTION_IL:
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/*
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* We attempted an illegal exception return. Guest state must
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* have been corrupted somehow. Give up.
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*/
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run->exit_reason = KVM_EXIT_FAIL_ENTRY;
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return -EINVAL;
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default:
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kvm_pr_unimpl("Unsupported exception type: %d",
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exception_index);
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run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
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return 0;
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}
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}
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/* For exit types that need handling before we can be preempted */
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void handle_exit_early(struct kvm_vcpu *vcpu, struct kvm_run *run,
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int exception_index)
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{
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if (ARM_SERROR_PENDING(exception_index)) {
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if (this_cpu_has_cap(ARM64_HAS_RAS_EXTN)) {
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u64 disr = kvm_vcpu_get_disr(vcpu);
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kvm_handle_guest_serror(vcpu, disr_to_esr(disr));
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} else {
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kvm_inject_vabt(vcpu);
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}
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return;
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}
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exception_index = ARM_EXCEPTION_CODE(exception_index);
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if (exception_index == ARM_EXCEPTION_EL1_SERROR)
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kvm_handle_guest_serror(vcpu, kvm_vcpu_get_hsr(vcpu));
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}
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