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01a9dbccbd
opal_xscom_read uses a pointer to return the data so we need to byteswap it on LE builds. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
131 lines
3.0 KiB
C
131 lines
3.0 KiB
C
/*
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* PowerNV LPC bus handling.
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*
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* Copyright 2013 IBM Corp.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/of.h>
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#include <linux/bug.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <asm/machdep.h>
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#include <asm/firmware.h>
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#include <asm/opal.h>
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#include <asm/scom.h>
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/*
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* We could probably fit that inside the scom_map_t
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* which is a void* after all but it's really too ugly
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* so let's kmalloc it for now
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*/
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struct opal_scom_map {
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uint32_t chip;
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uint64_t addr;
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};
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static scom_map_t opal_scom_map(struct device_node *dev, u64 reg, u64 count)
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{
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struct opal_scom_map *m;
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const __be32 *gcid;
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if (!of_get_property(dev, "scom-controller", NULL)) {
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pr_err("%s: device %s is not a SCOM controller\n",
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__func__, dev->full_name);
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return SCOM_MAP_INVALID;
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}
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gcid = of_get_property(dev, "ibm,chip-id", NULL);
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if (!gcid) {
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pr_err("%s: device %s has no ibm,chip-id\n",
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__func__, dev->full_name);
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return SCOM_MAP_INVALID;
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}
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m = kmalloc(sizeof(struct opal_scom_map), GFP_KERNEL);
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if (!m)
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return NULL;
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m->chip = be32_to_cpup(gcid);
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m->addr = reg;
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return (scom_map_t)m;
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}
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static void opal_scom_unmap(scom_map_t map)
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{
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kfree(map);
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}
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static int opal_xscom_err_xlate(int64_t rc)
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{
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switch(rc) {
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case 0:
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return 0;
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/* Add more translations if necessary */
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default:
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return -EIO;
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}
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}
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static u64 opal_scom_unmangle(u64 reg)
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{
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/*
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* XSCOM indirect addresses have the top bit set. Additionally
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* the reset of the top 3 nibbles is always 0.
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*
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* Because the debugfs interface uses signed offsets and shifts
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* the address left by 3, we basically cannot use the top 4 bits
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* of the 64-bit address, and thus cannot use the indirect bit.
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*
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* To deal with that, we support the indirect bit being in bit
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* 4 (IBM notation) instead of bit 0 in this API, we do the
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* conversion here. To leave room for further xscom address
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* expansion, we only clear out the top byte
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*
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*/
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if (reg & (1ull << 59))
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reg = (reg & ~(0xffull << 56)) | (1ull << 63);
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return reg;
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}
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static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
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{
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struct opal_scom_map *m = map;
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int64_t rc;
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__be64 v;
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reg = opal_scom_unmangle(reg);
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rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v));
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*value = be64_to_cpu(v);
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return opal_xscom_err_xlate(rc);
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}
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static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
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{
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struct opal_scom_map *m = map;
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int64_t rc;
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reg = opal_scom_unmangle(reg);
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rc = opal_xscom_write(m->chip, m->addr + reg, value);
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return opal_xscom_err_xlate(rc);
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}
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static const struct scom_controller opal_scom_controller = {
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.map = opal_scom_map,
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.unmap = opal_scom_unmap,
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.read = opal_scom_read,
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.write = opal_scom_write
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};
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static int opal_xscom_init(void)
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{
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if (firmware_has_feature(FW_FEATURE_OPALv3))
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scom_init(&opal_scom_controller);
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return 0;
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}
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arch_initcall(opal_xscom_init);
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