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bd490f8222
Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/20200707171121.GA13472@embeddedor Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
327 lines
7.9 KiB
C
327 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* IDT Interprise 79RC32434 watchdog driver
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*
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* Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org>
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* Copyright (C) 2008, Florian Fainelli <florian@openwrt.org>
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*
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* based on
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* SoftDog 0.05: A Software Watchdog Device
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*
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* (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
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* All Rights Reserved.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h> /* For module specific items */
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#include <linux/moduleparam.h> /* For new moduleparam's */
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#include <linux/types.h> /* For standard types (like size_t) */
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#include <linux/errno.h> /* For the -ENODEV/... values */
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#include <linux/kernel.h> /* For printk/panic/... */
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#include <linux/fs.h> /* For file operations */
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#include <linux/miscdevice.h> /* For struct miscdevice */
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#include <linux/watchdog.h> /* For the watchdog specific items */
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#include <linux/init.h> /* For __init/__exit/... */
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#include <linux/platform_device.h> /* For platform_driver framework */
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#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
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#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
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#include <linux/io.h> /* For devm_ioremap */
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#include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */
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#define VERSION "1.0"
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static struct {
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unsigned long inuse;
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spinlock_t io_lock;
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} rc32434_wdt_device;
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static struct integ __iomem *wdt_reg;
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static int expect_close;
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/* Board internal clock speed in Hz,
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* the watchdog timer ticks at. */
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extern unsigned int idt_cpu_freq;
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/* translate wtcompare value to seconds and vice versa */
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#define WTCOMP2SEC(x) (x / idt_cpu_freq)
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#define SEC2WTCOMP(x) (x * idt_cpu_freq)
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/* Use a default timeout of 20s. This should be
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* safe for CPU clock speeds up to 400MHz, as
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* ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */
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#define WATCHDOG_TIMEOUT 20
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static int timeout = WATCHDOG_TIMEOUT;
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout, "Watchdog timeout value, in seconds (default="
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__MODULE_STRING(WATCHDOG_TIMEOUT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/* apply or and nand masks to data read from addr and write back */
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#define SET_BITS(addr, or, nand) \
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writel((readl(&addr) | or) & ~nand, &addr)
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static int rc32434_wdt_set(int new_timeout)
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{
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int max_to = WTCOMP2SEC((u32)-1);
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if (new_timeout < 0 || new_timeout > max_to) {
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pr_err("timeout value must be between 0 and %d\n", max_to);
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return -EINVAL;
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}
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timeout = new_timeout;
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spin_lock(&rc32434_wdt_device.io_lock);
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writel(SEC2WTCOMP(timeout), &wdt_reg->wtcompare);
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spin_unlock(&rc32434_wdt_device.io_lock);
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return 0;
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}
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static void rc32434_wdt_start(void)
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{
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u32 or, nand;
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spin_lock(&rc32434_wdt_device.io_lock);
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/* zero the counter before enabling */
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writel(0, &wdt_reg->wtcount);
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/* don't generate a non-maskable interrupt,
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* do a warm reset instead */
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nand = 1 << RC32434_ERR_WNE;
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or = 1 << RC32434_ERR_WRE;
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/* reset the ERRCS timeout bit in case it's set */
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nand |= 1 << RC32434_ERR_WTO;
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SET_BITS(wdt_reg->errcs, or, nand);
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/* set the timeout (either default or based on module param) */
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rc32434_wdt_set(timeout);
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/* reset WTC timeout bit and enable WDT */
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nand = 1 << RC32434_WTC_TO;
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or = 1 << RC32434_WTC_EN;
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SET_BITS(wdt_reg->wtc, or, nand);
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spin_unlock(&rc32434_wdt_device.io_lock);
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pr_info("Started watchdog timer\n");
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}
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static void rc32434_wdt_stop(void)
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{
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spin_lock(&rc32434_wdt_device.io_lock);
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/* Disable WDT */
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SET_BITS(wdt_reg->wtc, 0, 1 << RC32434_WTC_EN);
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spin_unlock(&rc32434_wdt_device.io_lock);
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pr_info("Stopped watchdog timer\n");
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}
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static void rc32434_wdt_ping(void)
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{
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spin_lock(&rc32434_wdt_device.io_lock);
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writel(0, &wdt_reg->wtcount);
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spin_unlock(&rc32434_wdt_device.io_lock);
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}
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static int rc32434_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &rc32434_wdt_device.inuse))
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return -EBUSY;
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if (nowayout)
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__module_get(THIS_MODULE);
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rc32434_wdt_start();
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rc32434_wdt_ping();
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return stream_open(inode, file);
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}
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static int rc32434_wdt_release(struct inode *inode, struct file *file)
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{
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if (expect_close == 42) {
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rc32434_wdt_stop();
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module_put(THIS_MODULE);
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} else {
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pr_crit("device closed unexpectedly. WDT will not stop!\n");
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rc32434_wdt_ping();
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}
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clear_bit(0, &rc32434_wdt_device.inuse);
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return 0;
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}
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static ssize_t rc32434_wdt_write(struct file *file, const char *data,
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size_t len, loff_t *ppos)
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{
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if (len) {
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if (!nowayout) {
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size_t i;
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/* In case it was set long ago */
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expect_close = 0;
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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expect_close = 42;
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}
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}
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rc32434_wdt_ping();
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return len;
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}
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return 0;
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}
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static long rc32434_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int new_timeout;
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unsigned int value;
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static const struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.identity = "RC32434_WDT Watchdog",
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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if (copy_to_user(argp, &ident, sizeof(ident)))
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return -EFAULT;
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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value = 0;
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if (copy_to_user(argp, &value, sizeof(int)))
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return -EFAULT;
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break;
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case WDIOC_SETOPTIONS:
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if (copy_from_user(&value, argp, sizeof(int)))
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return -EFAULT;
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switch (value) {
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case WDIOS_ENABLECARD:
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rc32434_wdt_start();
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break;
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case WDIOS_DISABLECARD:
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rc32434_wdt_stop();
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break;
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default:
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return -EINVAL;
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}
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break;
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case WDIOC_KEEPALIVE:
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rc32434_wdt_ping();
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break;
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case WDIOC_SETTIMEOUT:
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if (copy_from_user(&new_timeout, argp, sizeof(int)))
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return -EFAULT;
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if (rc32434_wdt_set(new_timeout))
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return -EINVAL;
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fallthrough;
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case WDIOC_GETTIMEOUT:
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return copy_to_user(argp, &timeout, sizeof(int)) ? -EFAULT : 0;
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default:
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return -ENOTTY;
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}
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return 0;
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}
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static const struct file_operations rc32434_wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = rc32434_wdt_write,
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.unlocked_ioctl = rc32434_wdt_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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.open = rc32434_wdt_open,
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.release = rc32434_wdt_release,
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};
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static struct miscdevice rc32434_wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &rc32434_wdt_fops,
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};
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static int rc32434_wdt_probe(struct platform_device *pdev)
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{
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int ret;
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struct resource *r;
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r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rb532_wdt_res");
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if (!r) {
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pr_err("failed to retrieve resources\n");
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return -ENODEV;
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}
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wdt_reg = devm_ioremap(&pdev->dev, r->start, resource_size(r));
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if (!wdt_reg) {
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pr_err("failed to remap I/O resources\n");
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return -ENXIO;
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}
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spin_lock_init(&rc32434_wdt_device.io_lock);
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/* Make sure the watchdog is not running */
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rc32434_wdt_stop();
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/* Check that the heartbeat value is within it's range;
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* if not reset to the default */
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if (rc32434_wdt_set(timeout)) {
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rc32434_wdt_set(WATCHDOG_TIMEOUT);
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pr_info("timeout value must be between 0 and %d\n",
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WTCOMP2SEC((u32)-1));
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}
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ret = misc_register(&rc32434_wdt_miscdev);
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if (ret < 0) {
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pr_err("failed to register watchdog device\n");
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return ret;
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}
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pr_info("Watchdog Timer version " VERSION ", timer margin: %d sec\n",
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timeout);
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return 0;
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}
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static int rc32434_wdt_remove(struct platform_device *pdev)
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{
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misc_deregister(&rc32434_wdt_miscdev);
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return 0;
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}
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static void rc32434_wdt_shutdown(struct platform_device *pdev)
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{
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rc32434_wdt_stop();
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}
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static struct platform_driver rc32434_wdt_driver = {
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.probe = rc32434_wdt_probe,
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.remove = rc32434_wdt_remove,
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.shutdown = rc32434_wdt_shutdown,
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.driver = {
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.name = "rc32434_wdt",
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}
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};
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module_platform_driver(rc32434_wdt_driver);
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MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>,"
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"Florian Fainelli <florian@openwrt.org>");
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MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog");
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MODULE_LICENSE("GPL");
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