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All watchdog drivers implement the same set of ioctl commands, and fortunately all of them are compatible between 32-bit and 64-bit architectures. Modern drivers always go through drivers/watchdog/wdt.c as an abstraction layer, but older ones implement their own file_operations on a character device for this. Move the handling from fs/compat_ioctl.c into the individual drivers. Note that most of the legacy drivers will never be used on 64-bit hardware, because they are for an old 32-bit SoC implementation, but doing them all at once is safer than trying to guess which ones do or do not need the compat_ioctl handling. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
304 lines
6.8 KiB
C
304 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PIKA FPGA based Watchdog Timer
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*
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* Copyright (c) 2008 PIKA Technologies
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* Sean MacLennan <smaclennan@pikatech.com>
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/reboot.h>
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#include <linux/jiffies.h>
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#include <linux/timer.h>
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#include <linux/bitops.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#define DRV_NAME "PIKA-WDT"
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/* Hardware timeout in seconds */
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#define WDT_HW_TIMEOUT 2
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/* Timer heartbeat (500ms) */
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#define WDT_TIMEOUT (HZ/2)
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/* User land timeout */
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#define WDT_HEARTBEAT 15
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static int heartbeat = WDT_HEARTBEAT;
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
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"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static struct {
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void __iomem *fpga;
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unsigned long next_heartbeat; /* the next_heartbeat for the timer */
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unsigned long open;
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char expect_close;
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int bootstatus;
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struct timer_list timer; /* The timer that pings the watchdog */
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} pikawdt_private;
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static struct watchdog_info ident __ro_after_init = {
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.identity = DRV_NAME,
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.options = WDIOF_CARDRESET |
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WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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};
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/*
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* Reload the watchdog timer. (ie, pat the watchdog)
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*/
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static inline void pikawdt_reset(void)
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{
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/* -- FPGA: Reset Control Register (32bit R/W) (Offset: 0x14) --
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* Bit 7, WTCHDG_EN: When set to 1, the watchdog timer is enabled.
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* Once enabled, it cannot be disabled. The watchdog can be
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* kicked by performing any write access to the reset
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* control register (this register).
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* Bit 8-11, WTCHDG_TIMEOUT_SEC: Sets the watchdog timeout value in
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* seconds. Valid ranges are 1 to 15 seconds. The value can
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* be modified dynamically.
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*/
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unsigned reset = in_be32(pikawdt_private.fpga + 0x14);
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/* enable with max timeout - 15 seconds */
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reset |= (1 << 7) + (WDT_HW_TIMEOUT << 8);
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out_be32(pikawdt_private.fpga + 0x14, reset);
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}
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/*
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* Timer tick
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*/
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static void pikawdt_ping(struct timer_list *unused)
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{
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if (time_before(jiffies, pikawdt_private.next_heartbeat) ||
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(!nowayout && !pikawdt_private.open)) {
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pikawdt_reset();
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mod_timer(&pikawdt_private.timer, jiffies + WDT_TIMEOUT);
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} else
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pr_crit("I will reset your machine !\n");
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}
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static void pikawdt_keepalive(void)
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{
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pikawdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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}
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static void pikawdt_start(void)
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{
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pikawdt_keepalive();
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mod_timer(&pikawdt_private.timer, jiffies + WDT_TIMEOUT);
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}
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/*
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* Watchdog device is opened, and watchdog starts running.
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*/
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static int pikawdt_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &pikawdt_private.open))
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return -EBUSY;
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pikawdt_start();
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return stream_open(inode, file);
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}
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/*
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* Close the watchdog device.
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*/
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static int pikawdt_release(struct inode *inode, struct file *file)
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{
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/* stop internal ping */
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if (!pikawdt_private.expect_close)
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del_timer(&pikawdt_private.timer);
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clear_bit(0, &pikawdt_private.open);
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pikawdt_private.expect_close = 0;
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return 0;
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}
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/*
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* Pat the watchdog whenever device is written to.
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*/
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static ssize_t pikawdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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if (!len)
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return 0;
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/* Scan for magic character */
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if (!nowayout) {
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size_t i;
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pikawdt_private.expect_close = 0;
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for (i = 0; i < len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V') {
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pikawdt_private.expect_close = 42;
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break;
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}
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}
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}
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pikawdt_keepalive();
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return len;
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}
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/*
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* Handle commands from user-space.
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*/
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static long pikawdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int new_value;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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return put_user(0, p);
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case WDIOC_GETBOOTSTATUS:
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return put_user(pikawdt_private.bootstatus, p);
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case WDIOC_KEEPALIVE:
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pikawdt_keepalive();
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_value, p))
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return -EFAULT;
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heartbeat = new_value;
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pikawdt_keepalive();
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return put_user(new_value, p); /* return current value */
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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}
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return -ENOTTY;
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}
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static const struct file_operations pikawdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.open = pikawdt_open,
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.release = pikawdt_release,
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.write = pikawdt_write,
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.unlocked_ioctl = pikawdt_ioctl,
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.compat_ioctl = compat_ptr_ioctl,
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};
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static struct miscdevice pikawdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &pikawdt_fops,
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};
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static int __init pikawdt_init(void)
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{
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struct device_node *np;
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void __iomem *fpga;
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u32 post1;
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int ret;
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np = of_find_compatible_node(NULL, NULL, "pika,fpga");
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if (np == NULL) {
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pr_err("Unable to find fpga\n");
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return -ENOENT;
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}
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pikawdt_private.fpga = of_iomap(np, 0);
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of_node_put(np);
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if (pikawdt_private.fpga == NULL) {
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pr_err("Unable to map fpga\n");
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return -ENOMEM;
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}
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ident.firmware_version = in_be32(pikawdt_private.fpga + 0x1c) & 0xffff;
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/* POST information is in the sd area. */
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np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd");
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if (np == NULL) {
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pr_err("Unable to find fpga-sd\n");
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ret = -ENOENT;
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goto out;
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}
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fpga = of_iomap(np, 0);
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of_node_put(np);
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if (fpga == NULL) {
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pr_err("Unable to map fpga-sd\n");
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ret = -ENOMEM;
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goto out;
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}
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/* -- FPGA: POST Test Results Register 1 (32bit R/W) (Offset: 0x4040) --
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* Bit 31, WDOG: Set to 1 when the last reset was caused by a watchdog
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* timeout.
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*/
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post1 = in_be32(fpga + 0x40);
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if (post1 & 0x80000000)
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pikawdt_private.bootstatus = WDIOF_CARDRESET;
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iounmap(fpga);
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timer_setup(&pikawdt_private.timer, pikawdt_ping, 0);
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ret = misc_register(&pikawdt_miscdev);
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if (ret) {
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pr_err("Unable to register miscdev\n");
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goto out;
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}
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pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
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heartbeat, nowayout);
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return 0;
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out:
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iounmap(pikawdt_private.fpga);
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return ret;
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}
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static void __exit pikawdt_exit(void)
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{
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misc_deregister(&pikawdt_miscdev);
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iounmap(pikawdt_private.fpga);
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}
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module_init(pikawdt_init);
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module_exit(pikawdt_exit);
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MODULE_AUTHOR("Sean MacLennan <smaclennan@pikatech.com>");
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MODULE_DESCRIPTION("PIKA FPGA based Watchdog Timer");
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MODULE_LICENSE("GPL");
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