mirror of
https://github.com/torvalds/linux.git
synced 2024-12-05 10:32:35 +00:00
e35a4a4e13
* Replace the expert mode symbols with a single helper * Fix misuses of of_match_ptr() * Remove partid and partname debugfs files * tests: Fix eraseblock read speed miscalculation for lower partition sizes * TRX parser: Allow to use on MediaTek MIPS SoCs MTD driver changes: * spear_smi: use GFP_KERNEL * mchp48l640: Add SPI ID table * mchp23k256: Add SPI ID table * blkdevs: Avoid soft lockups with some mtd/spi devices * aspeed-smc: Improve probe resilience Hyperbus changes: * HBMC_AM654 should depend on ARCH_K3 NAND core changes: * ECC: - Add infrastructure to support hardware engines - Add a new helper to retrieve the ECC context - Provide a helper to retrieve a pilelined engine device NAND-ECC changes: * Macronix ECC engine: - Add Macronix external ECC engine support - Support SPI pipelined mode - Make two read-only arrays static const - Fix compile test issue Raw NAND core changes: * Fix misuses of of_match_node() * Rework of_get_nand_bus_width() * Remove of_get_nand_on_flash_bbt() wrapper * Protect access to rawnand devices while in suspend * bindings: Document the wp-gpios property Rax NAND controller driver changes: * atmel: Fix refcount issue in atmel_nand_controller_init * nandsim: - Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern - Merge repeat codes in ns_switch_state - Replace overflow check with kzalloc to single kcalloc * rockchip: Fix platform_get_irq.cocci warning * stm32_fmc2: Add NAND Write Protect support * pl353: Set the nand chip node as the flash node * brcmnand: Fix sparse warnings in bcma_nand * omap_elm: Remove redundant variable 'errors' * gpmi: - Support fast edo timings for mx28 - Validate controller clock rate - Fix controller timings setting * brcmnand: - Add BCMA shim - BCMA controller uses command shift of 0 - Allow platform data instantation - Add platform data structure for BCMA - Allow working without interrupts - Move OF operations out of brcmnand_init_cs() - Avoid pdev in brcmnand_init_cs() - Allow SoC to provide I/O operations - Assign soc as early as possible Onenand changes: * Check for error irq SPI-NAND core changes: * Delay a little bit the dirmap creation * Create direct mapping descriptors for ECC operations SPI-NAND driver changes: * macronix: Use random program load SPI NOR core changes: * Move vendor specific code out of the core into vendor drivers. * Unify all function and object names in the vendor modules. * Make setup() callback optional to improve readability. * Skip erase logic when the SPI_NOR_NO_ERASE flag is set at flash declaration. SPI changes: * Macronix SPI controller: - Fix the transmit path - Create a helper to configure the controller before an operation - Create a helper to ease the start of an operation - Add support for direct mapping - Add support for pipelined ECC operations * spi-mem: - Introduce a capability structure - Check the controller extra capabilities - cadence-quadspi/mxic: Provide capability structures - Kill the spi_mem_dtr_supports_op() helper - Add an ecc parameter to the spi_mem_op structure Binding changes: * Dropped mtd/cortina,gemini-flash.txt * Convert BCM47xx partitions to json-schema * Vendor prefixes: Clarify Macronix prefix * SPI NAND: Convert spi-nand description file to yaml * Raw NAND chip: Create a NAND chip description * Raw NAND controller: - Harmonize the property types - Fix a comment in the examples - Fix the reg property description * Describe Macronix NAND ECC engine * Macronix SPI controller: - Document the nand-ecc-engine property - Convert to yaml - The interrupt property is not mandatory -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmI7WJcACgkQJWrqGEe9 VoSzpAgAutzRv9TRUiXdBGGlJ851QaZ6ZUvT1bHKTQA+xZi+MZyNmc0cWNg3B70I PnwyxNAmRkUQKwV5Vgy/sQrt42qZnPmr+8XMq+UiziPmgFdjiTdLqGcN619Hi12t JqtoKL828R064LSEq5nWsJ2waoGT1nNtZK8kA2qe8ctvmH0YTThriVZUQR4/Befb OGFheceLFycE/vkktPPr3As4603fMiyDOT7EA3Mtzgjohry0a0TqoakHCaHC/fYo 0/h+x+jJATPtgbWm1ZiV3cZ/Su00+rKuQOsiAWvM/pqDaijsVntBmtK0PRtums2Q m8LCspuQYNnCINeQXqba9RxACpibDg== =+6Zk -----END PGP SIGNATURE----- Merge tag 'mtd/changes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "There has been a lot of activity in the MTD subsystem recently, with a number of SPI-NOR cleanups as well as the introduction of ECC engines that can be used by SPI controllers (hence a few SPI patches in here). Core MTD changes: - Replace the expert mode symbols with a single helper - Fix misuses of of_match_ptr() - Remove partid and partname debugfs files - tests: Fix eraseblock read speed miscalculation for lower partition sizes - TRX parser: Allow to use on MediaTek MIPS SoCs MTD driver changes: - spear_smi: use GFP_KERNEL - mchp48l640: Add SPI ID table - mchp23k256: Add SPI ID table - blkdevs: Avoid soft lockups with some mtd/spi devices - aspeed-smc: Improve probe resilience Hyperbus changes: - HBMC_AM654 should depend on ARCH_K3 NAND core changes: - ECC: - Add infrastructure to support hardware engines - Add a new helper to retrieve the ECC context - Provide a helper to retrieve a pilelined engine device NAND-ECC changes: - Macronix ECC engine: - Add Macronix external ECC engine support - Support SPI pipelined mode - Make two read-only arrays static const - Fix compile test issue Raw NAND core changes: - Fix misuses of of_match_node() - Rework of_get_nand_bus_width() - Remove of_get_nand_on_flash_bbt() wrapper - Protect access to rawnand devices while in suspend - bindings: Document the wp-gpios property Rax NAND controller driver changes: - atmel: Fix refcount issue in atmel_nand_controller_init - nandsim: - Add NS_PAGE_BYTE_SHIFT macro to replace the repeat pattern - Merge repeat codes in ns_switch_state - Replace overflow check with kzalloc to single kcalloc - rockchip: Fix platform_get_irq.cocci warning - stm32_fmc2: Add NAND Write Protect support - pl353: Set the nand chip node as the flash node - brcmnand: Fix sparse warnings in bcma_nand - omap_elm: Remove redundant variable 'errors' - gpmi: - Support fast edo timings for mx28 - Validate controller clock rate - Fix controller timings setting - brcmnand: - Add BCMA shim - BCMA controller uses command shift of 0 - Allow platform data instantation - Add platform data structure for BCMA - Allow working without interrupts - Move OF operations out of brcmnand_init_cs() - Avoid pdev in brcmnand_init_cs() - Allow SoC to provide I/O operations - Assign soc as early as possible Onenand changes: - Check for error irq SPI-NAND core changes: - Delay a little bit the dirmap creation - Create direct mapping descriptors for ECC operations SPI-NAND driver changes: - macronix: Use random program load SPI NOR core changes: - Move vendor specific code out of the core into vendor drivers. - Unify all function and object names in the vendor modules. - Make setup() callback optional to improve readability. - Skip erase logic when the SPI_NOR_NO_ERASE flag is set at flash declaration. SPI changes: - Macronix SPI controller: - Fix the transmit path - Create a helper to configure the controller before an operation - Create a helper to ease the start of an operation - Add support for direct mapping - Add support for pipelined ECC operations - spi-mem: - Introduce a capability structure - Check the controller extra capabilities - cadence-quadspi/mxic: Provide capability structures - Kill the spi_mem_dtr_supports_op() helper - Add an ecc parameter to the spi_mem_op structure Binding changes: - Dropped mtd/cortina,gemini-flash.txt - Convert BCM47xx partitions to json-schema - Vendor prefixes: Clarify Macronix prefix - SPI NAND: Convert spi-nand description file to yaml - Raw NAND chip: Create a NAND chip description - Raw NAND controller: - Harmonize the property types - Fix a comment in the examples - Fix the reg property description - Describe Macronix NAND ECC engine - Macronix SPI controller: - Document the nand-ecc-engine property - Convert to yaml - The interrupt property is not mandatory" * tag 'mtd/changes-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (104 commits) mtd: nand: ecc: mxic: Fix compile test issue mtd: nand: mxic-ecc: make two read-only arrays static const mtd: hyperbus: HBMC_AM654 should depend on ARCH_K3 mtd: core: Remove partid and partname debugfs files dt-bindings: mtd: partitions: convert BCM47xx to the json-schema mtd: tests: Fix eraseblock read speed miscalculation for lower partition sizes mtd: rawnand: atmel: fix refcount issue in atmel_nand_controller_init mtd: rawnand: rockchip: fix platform_get_irq.cocci warning mtd: spi-nor: Skip erase logic when SPI_NOR_NO_ERASE is set mtd: spi-nor: renumber flags mtd: spi-nor: slightly change code style in spi_nor_sr_ready() mtd: spi-nor: spansion: rename vendor specific functions and defines mtd: spi-nor: spansion: convert USE_CLSR to a manufacturer flag mtd: spi-nor: move all spansion specifics into spansion.c mtd: spi-nor: spansion: slightly rework control flow in late_init() mtd: spi-nor: micron-st: rename vendor specific functions and defines mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag mtd: spi-nor: move all micron-st specifics into micron-st.c mtd: spi-nor: xilinx: correct the debug message mtd: spi-nor: xilinx: rename vendor specific functions and defines ...
1152 lines
36 KiB
Plaintext
1152 lines
36 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
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#
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# SPI driver configuration
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#
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menuconfig SPI
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bool "SPI support"
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depends on HAS_IOMEM
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help
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The "Serial Peripheral Interface" is a low level synchronous
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protocol. Chips that support SPI can have data transfer rates
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up to several tens of Mbit/sec. Chips are addressed with a
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controller and a chipselect. Most SPI slaves don't support
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dynamic device discovery; some are even write-only or read-only.
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SPI is widely used by microcontrollers to talk with sensors,
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eeprom and flash memory, codecs and various other controller
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chips, analog to digital (and d-to-a) converters, and more.
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MMC and SD cards can be accessed using SPI protocol; and for
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DataFlash cards used in MMC sockets, SPI must always be used.
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SPI is one of a family of similar protocols using a four wire
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interface (select, clock, data in, data out) including Microwire
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(half duplex), SSP, SSI, and PSP. This driver framework should
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work with most such devices and controllers.
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if SPI
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config SPI_DEBUG
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bool "Debug support for SPI drivers"
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depends on DEBUG_KERNEL
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help
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Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
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sysfs, and debugfs support in SPI controller and protocol drivers.
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#
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# MASTER side ... talking to discrete SPI slave chips including microcontrollers
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#
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config SPI_MASTER
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# bool "SPI Master Support"
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bool
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default SPI
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help
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If your system has an master-capable SPI controller (which
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provides the clock and chipselect), you can enable that
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controller and the protocol drivers for the SPI slave chips
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that are connected.
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if SPI_MASTER
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config SPI_MEM
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bool "SPI memory extension"
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help
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Enable this option if you want to enable the SPI memory extension.
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This extension is meant to simplify interaction with SPI memories
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by providing a high-level interface to send memory-like commands.
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comment "SPI Master Controller Drivers"
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config SPI_ALTERA
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tristate "Altera SPI Controller platform driver"
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select SPI_ALTERA_CORE
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select REGMAP_MMIO
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help
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This is the driver for the Altera SPI Controller.
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config SPI_ALTERA_CORE
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tristate "Altera SPI Controller core code" if COMPILE_TEST
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select REGMAP
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help
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"The core code for the Altera SPI Controller"
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config SPI_ALTERA_DFL
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tristate "DFL bus driver for Altera SPI Controller"
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depends on FPGA_DFL
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select SPI_ALTERA_CORE
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help
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This is a Device Feature List (DFL) bus driver for the
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Altera SPI master controller. The SPI master is connected
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to a SPI slave to Avalon bridge in a Intel MAX BMC.
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config SPI_AR934X
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tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver"
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depends on ATH79 || COMPILE_TEST
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help
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This enables support for the SPI controller present on the
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Qualcomm Atheros AR934X/QCA95XX SoCs.
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config SPI_ATH79
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tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver"
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depends on ATH79 || COMPILE_TEST
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select SPI_BITBANG
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help
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This enables support for the SPI controller present on the
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Atheros AR71XX/AR724X/AR913X SoCs.
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config SPI_ARMADA_3700
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tristate "Marvell Armada 3700 SPI Controller"
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depends on (ARCH_MVEBU && OF) || COMPILE_TEST
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help
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This enables support for the SPI controller present on the
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Marvell Armada 3700 SoCs.
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config SPI_ATMEL
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tristate "Atmel SPI Controller"
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depends on ARCH_AT91 || COMPILE_TEST
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depends on OF
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help
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This selects a driver for the Atmel SPI Controller, present on
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many AT91 ARM chips.
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config SPI_AT91_USART
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tristate "Atmel USART Controller SPI driver"
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depends on (ARCH_AT91 || COMPILE_TEST)
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depends on MFD_AT91_USART
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help
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This selects a driver for the AT91 USART Controller as SPI Master,
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present on AT91 and SAMA5 SoC series.
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config SPI_ATMEL_QUADSPI
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tristate "Atmel Quad SPI Controller"
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depends on ARCH_AT91 || COMPILE_TEST
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depends on OF && HAS_IOMEM
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help
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This enables support for the Quad SPI controller in master mode.
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This driver does not support generic SPI. The implementation only
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supports spi-mem interface.
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config SPI_AU1550
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tristate "Au1550/Au1200/Au1300 SPI Controller"
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depends on MIPS_ALCHEMY
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select SPI_BITBANG
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help
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If you say yes to this option, support will be included for the
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PSC SPI controller found on Au1550, Au1200 and Au1300 series.
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config SPI_AXI_SPI_ENGINE
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tristate "Analog Devices AXI SPI Engine controller"
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depends on HAS_IOMEM
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help
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This enables support for the Analog Devices AXI SPI Engine SPI controller.
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It is part of the SPI Engine framework that is used in some Analog Devices
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reference designs for FPGAs.
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config SPI_BCM2835
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tristate "BCM2835 SPI controller"
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depends on GPIOLIB
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depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
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help
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This selects a driver for the Broadcom BCM2835 SPI master.
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The BCM2835 contains two types of SPI master controller; the
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"universal SPI master", and the regular SPI controller. This driver
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is for the regular SPI controller. Slave mode operation is not also
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not supported.
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config SPI_BCM2835AUX
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tristate "BCM2835 SPI auxiliary controller"
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depends on ((ARCH_BCM2835 || ARCH_BRCMSTB) && GPIOLIB) || COMPILE_TEST
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help
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This selects a driver for the Broadcom BCM2835 SPI aux master.
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The BCM2835 contains two types of SPI master controller; the
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"universal SPI master", and the regular SPI controller.
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This driver is for the universal/auxiliary SPI controller.
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config SPI_BCM63XX
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tristate "Broadcom BCM63xx SPI controller"
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depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
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help
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Enable support for the SPI controller on the Broadcom BCM63xx SoCs.
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config SPI_BCM63XX_HSSPI
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tristate "Broadcom BCM63XX HS SPI controller driver"
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depends on BCM63XX || BMIPS_GENERIC || ARCH_BCM_63XX || COMPILE_TEST
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help
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This enables support for the High Speed SPI controller present on
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newer Broadcom BCM63XX SoCs.
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config SPI_BCM_QSPI
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tristate "Broadcom BSPI and MSPI controller support"
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depends on ARCH_BRCMSTB || ARCH_BCM || ARCH_BCM_IPROC || \
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BMIPS_GENERIC || COMPILE_TEST
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default ARCH_BCM_IPROC
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help
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Enables support for the Broadcom SPI flash and MSPI controller.
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Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
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based platforms. This driver works for both SPI master for SPI NOR
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flash device as well as MSPI device.
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config SPI_BITBANG
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tristate "Utilities for Bitbanging SPI masters"
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help
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With a few GPIO pins, your system can bitbang the SPI protocol.
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Select this to get SPI support through I/O pins (GPIO, parallel
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port, etc). Or, some systems' SPI master controller drivers use
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this code to manage the per-word or per-transfer accesses to the
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hardware shift registers.
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This is library code, and is automatically selected by drivers that
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need it. You only need to select this explicitly to support driver
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modules that aren't part of this kernel tree.
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config SPI_BUTTERFLY
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tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
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depends on PARPORT
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select SPI_BITBANG
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help
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This uses a custom parallel port cable to connect to an AVR
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Butterfly <http://www.atmel.com/products/avr/butterfly>, an
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inexpensive battery powered microcontroller evaluation board.
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This same cable can be used to flash new firmware.
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config SPI_CADENCE
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tristate "Cadence SPI controller"
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help
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This selects the Cadence SPI controller master driver
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used by Xilinx Zynq and ZynqMP.
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config SPI_CADENCE_QUADSPI
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tristate "Cadence Quad SPI controller"
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depends on OF && (ARM || ARM64 || X86 || COMPILE_TEST)
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help
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Enable support for the Cadence Quad SPI Flash controller.
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Cadence QSPI is a specialized controller for connecting an SPI
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Flash over 1/2/4-bit wide bus. Enable this option if you have a
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device with a Cadence QSPI controller and want to access the
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Flash as an MTD device.
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config SPI_CADENCE_XSPI
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tristate "Cadence XSPI controller"
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depends on (OF || COMPILE_TEST) && HAS_IOMEM
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depends on SPI_MEM
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help
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Enable support for the Cadence XSPI Flash controller.
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Cadence XSPI is a specialized controller for connecting an SPI
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Flash over upto 8bit wide bus. Enable this option if you have a
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device with a Cadence XSPI controller and want to access the
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Flash as an MTD device.
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config SPI_CLPS711X
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tristate "CLPS711X host SPI controller"
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depends on ARCH_CLPS711X || COMPILE_TEST
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help
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This enables dedicated general purpose SPI/Microwire1-compatible
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master mode interface (SSI1) for CLPS711X-based CPUs.
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config SPI_COLDFIRE_QSPI
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tristate "Freescale Coldfire QSPI controller"
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depends on (M520x || M523x || M5249 || M525x || M527x || M528x || M532x)
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help
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This enables support for the Coldfire QSPI controller in master
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mode.
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config SPI_DAVINCI
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tristate "Texas Instruments DaVinci/DA8x/OMAP-L/AM1x SoC SPI controller"
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depends on ARCH_DAVINCI || ARCH_KEYSTONE
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select SPI_BITBANG
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help
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SPI master controller for DaVinci/DA8x/OMAP-L/AM1x SPI modules.
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config SPI_DESIGNWARE
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tristate "DesignWare SPI controller core support"
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imply SPI_MEM
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help
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general driver for SPI controller core from DesignWare
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if SPI_DESIGNWARE
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config SPI_DW_DMA
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bool "DMA support for DW SPI controller"
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config SPI_DW_PCI
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tristate "PCI interface driver for DW SPI core"
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depends on PCI
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config SPI_DW_MMIO
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tristate "Memory-mapped io interface driver for DW SPI core"
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depends on HAS_IOMEM
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config SPI_DW_BT1
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tristate "Baikal-T1 SPI driver for DW SPI core"
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depends on MIPS_BAIKAL_T1 || COMPILE_TEST
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select MULTIPLEXER
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select MUX_MMIO
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help
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Baikal-T1 SoC is equipped with three DW APB SSI-based MMIO SPI
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controllers. Two of them are pretty much normal: with IRQ, DMA,
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FIFOs of 64 words depth, 4x CSs, but the third one as being a
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part of the Baikal-T1 System Boot Controller has got a very
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limited resources: no IRQ, no DMA, only a single native
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chip-select and Tx/Rx FIFO with just 8 words depth available.
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The later one is normally connected to an external SPI-nor flash
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of 128Mb (in general can be of bigger size).
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config SPI_DW_BT1_DIRMAP
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bool "Directly mapped Baikal-T1 Boot SPI flash support"
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depends on SPI_DW_BT1
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help
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Directly mapped SPI flash memory is an interface specific to the
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Baikal-T1 System Boot Controller. It is a 16MB MMIO region, which
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can be used to access a peripheral memory device just by
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reading/writing data from/to it. Note that the system APB bus
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will stall during each IO from/to the dirmap region until the
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operation is finished. So try not to use it concurrently with
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time-critical tasks (like the SPI memory operations implemented
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in this driver).
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endif
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config SPI_DLN2
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tristate "Diolan DLN-2 USB SPI adapter"
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depends on MFD_DLN2
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help
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If you say yes to this option, support will be included for Diolan
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DLN2, a USB to SPI interface.
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This driver can also be built as a module. If so, the module
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will be called spi-dln2.
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config SPI_EP93XX
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tristate "Cirrus Logic EP93xx SPI controller"
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depends on ARCH_EP93XX || COMPILE_TEST
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help
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This enables using the Cirrus EP93xx SPI controller in master
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mode.
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config SPI_FALCON
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bool "Falcon SPI controller support"
|
|
depends on SOC_FALCON
|
|
help
|
|
The external bus unit (EBU) found on the FALC-ON SoC has SPI
|
|
emulation that is designed for serial flash access. This driver
|
|
has only been tested with m25p80 type chips. The hardware has no
|
|
support for other types of SPI peripherals.
|
|
|
|
config SPI_FSI
|
|
tristate "FSI SPI driver"
|
|
depends on FSI
|
|
help
|
|
This enables support for the driver for FSI bus attached SPI
|
|
controllers.
|
|
|
|
config SPI_FSL_LPSPI
|
|
tristate "Freescale i.MX LPSPI controller"
|
|
depends on ARCH_MXC || COMPILE_TEST
|
|
help
|
|
This enables Freescale i.MX LPSPI controllers in master mode.
|
|
|
|
config SPI_FSL_QUADSPI
|
|
tristate "Freescale QSPI controller"
|
|
depends on ARCH_MXC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
|
|
depends on HAS_IOMEM
|
|
help
|
|
This enables support for the Quad SPI controller in master mode.
|
|
Up to four flash chips can be connected on two buses with two
|
|
chipselects each.
|
|
This controller does not support generic SPI messages. It only
|
|
supports the high-level SPI memory interface.
|
|
|
|
config SPI_HISI_KUNPENG
|
|
tristate "HiSilicon SPI Controller for Kunpeng SoCs"
|
|
depends on (ARM64 && ACPI) || COMPILE_TEST
|
|
help
|
|
This enables support for HiSilicon SPI controller found on
|
|
Kunpeng SoCs.
|
|
|
|
This driver can also be built as a module. If so, the module
|
|
will be called hisi-kunpeng-spi.
|
|
|
|
config SPI_HISI_SFC_V3XX
|
|
tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets"
|
|
depends on (ARM64 && ACPI) || COMPILE_TEST
|
|
depends on HAS_IOMEM
|
|
help
|
|
This enables support for HiSilicon v3xx SPI NOR flash controller
|
|
found in hi16xx chipsets.
|
|
|
|
config SPI_NXP_FLEXSPI
|
|
tristate "NXP Flex SPI controller"
|
|
depends on ARCH_LAYERSCAPE || HAS_IOMEM
|
|
help
|
|
This enables support for the Flex SPI controller in master mode.
|
|
Up to four slave devices can be connected on two buses with two
|
|
chipselects each.
|
|
This controller does not support generic SPI messages and only
|
|
supports the high-level SPI memory interface.
|
|
|
|
config SPI_GPIO
|
|
tristate "GPIO-based bitbanging SPI Master"
|
|
depends on GPIOLIB || COMPILE_TEST
|
|
select SPI_BITBANG
|
|
help
|
|
This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
|
|
interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
|
|
slaves connected to a bus using this driver are configured as usual,
|
|
except that the spi_board_info.controller_data holds the GPIO number
|
|
for the chipselect used by this controller driver.
|
|
|
|
Note that this driver often won't achieve even 1 Mbit/sec speeds,
|
|
making it unusually slow for SPI. If your platform can inline
|
|
GPIO operations, you should be able to leverage that for better
|
|
speed with a custom version of this driver; see the source code.
|
|
|
|
config SPI_IMG_SPFI
|
|
tristate "IMG SPFI controller"
|
|
depends on MIPS || COMPILE_TEST
|
|
help
|
|
This enables support for the SPFI master controller found on
|
|
IMG SoCs.
|
|
|
|
config SPI_IMX
|
|
tristate "Freescale i.MX SPI controllers"
|
|
depends on ARCH_MXC || COMPILE_TEST
|
|
select SPI_BITBANG
|
|
help
|
|
This enables support for the Freescale i.MX SPI controllers.
|
|
|
|
config SPI_INGENIC
|
|
tristate "Ingenic JZ47xx SoCs SPI controller"
|
|
depends on MACH_INGENIC || COMPILE_TEST
|
|
help
|
|
This enables support for the Ingenic JZ47xx SoCs SPI controller.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called spi-ingenic.
|
|
|
|
config SPI_INTEL
|
|
tristate
|
|
|
|
config SPI_INTEL_PCI
|
|
tristate "Intel PCH/PCU SPI flash PCI driver (DANGEROUS)"
|
|
depends on PCI
|
|
depends on X86 || COMPILE_TEST
|
|
depends on SPI_MEM
|
|
select SPI_INTEL
|
|
help
|
|
This enables PCI support for the Intel PCH/PCU SPI controller in
|
|
master mode. This controller is present in modern Intel hardware
|
|
and is used to hold BIOS and other persistent settings. Using
|
|
this driver it is possible to upgrade BIOS directly from Linux.
|
|
|
|
Say N here unless you know what you are doing. Overwriting the
|
|
SPI flash may render the system unbootable.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called spi-intel-pci.
|
|
|
|
config SPI_INTEL_PLATFORM
|
|
tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)"
|
|
depends on X86 || COMPILE_TEST
|
|
depends on SPI_MEM
|
|
select SPI_INTEL
|
|
help
|
|
This enables platform support for the Intel PCH/PCU SPI
|
|
controller in master mode. This controller is present in modern
|
|
Intel hardware and is used to hold BIOS and other persistent
|
|
settings. Using this driver it is possible to upgrade BIOS
|
|
directly from Linux.
|
|
|
|
Say N here unless you know what you are doing. Overwriting the
|
|
SPI flash may render the system unbootable.
|
|
|
|
To compile this driver as a module, choose M here: the module
|
|
will be called spi-intel-platform.
|
|
|
|
config SPI_JCORE
|
|
tristate "J-Core SPI Master"
|
|
depends on OF && (SUPERH || COMPILE_TEST)
|
|
help
|
|
This enables support for the SPI master controller in the J-Core
|
|
synthesizable, open source SoC.
|
|
|
|
config SPI_LM70_LLP
|
|
tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
|
|
depends on PARPORT
|
|
select SPI_BITBANG
|
|
help
|
|
This driver supports the NS LM70 LLP Evaluation Board,
|
|
which interfaces to an LM70 temperature sensor using
|
|
a parallel port.
|
|
|
|
config SPI_LP8841_RTC
|
|
tristate "ICP DAS LP-8841 SPI Controller for RTC"
|
|
depends on MACH_PXA27X_DT || COMPILE_TEST
|
|
help
|
|
This driver provides an SPI master device to drive Maxim
|
|
DS-1302 real time clock.
|
|
|
|
Say N here unless you plan to run the kernel on an ICP DAS
|
|
LP-8x4x industrial computer.
|
|
|
|
config SPI_MPC52xx
|
|
tristate "Freescale MPC52xx SPI (non-PSC) controller support"
|
|
depends on PPC_MPC52xx
|
|
help
|
|
This drivers supports the MPC52xx SPI controller in master SPI
|
|
mode.
|
|
|
|
config SPI_MPC52xx_PSC
|
|
tristate "Freescale MPC52xx PSC SPI controller"
|
|
depends on PPC_MPC52xx
|
|
help
|
|
This enables using the Freescale MPC52xx Programmable Serial
|
|
Controller in master SPI mode.
|
|
|
|
config SPI_MPC512x_PSC
|
|
tristate "Freescale MPC512x PSC SPI controller"
|
|
depends on PPC_MPC512x
|
|
help
|
|
This enables using the Freescale MPC5121 Programmable Serial
|
|
Controller in SPI master mode.
|
|
|
|
config SPI_FSL_LIB
|
|
tristate
|
|
depends on OF
|
|
|
|
config SPI_FSL_CPM
|
|
tristate
|
|
depends on FSL_SOC
|
|
|
|
config SPI_FSL_SPI
|
|
tristate "Freescale SPI controller and Aeroflex Gaisler GRLIB SPI controller"
|
|
depends on OF
|
|
select SPI_FSL_LIB
|
|
select SPI_FSL_CPM if FSL_SOC
|
|
help
|
|
This enables using the Freescale SPI controllers in master mode.
|
|
MPC83xx platform uses the controller in cpu mode or CPM/QE mode.
|
|
MPC8569 uses the controller in QE mode, MPC8610 in cpu mode.
|
|
This also enables using the Aeroflex Gaisler GRLIB SPI controller in
|
|
master mode.
|
|
|
|
config SPI_FSL_DSPI
|
|
tristate "Freescale DSPI controller"
|
|
select REGMAP_MMIO
|
|
depends on SOC_VF610 || SOC_LS1021A || ARCH_LAYERSCAPE || M5441x || COMPILE_TEST
|
|
help
|
|
This enables support for the Freescale DSPI controller in master
|
|
mode. VF610, LS1021A and ColdFire platforms uses the controller.
|
|
|
|
config SPI_FSL_ESPI
|
|
tristate "Freescale eSPI controller"
|
|
depends on FSL_SOC
|
|
help
|
|
This enables using the Freescale eSPI controllers in master mode.
|
|
From MPC8536, 85xx platform uses the controller, and all P10xx,
|
|
P20xx, P30xx,P40xx, P50xx uses this controller.
|
|
|
|
config SPI_MESON_SPICC
|
|
tristate "Amlogic Meson SPICC controller"
|
|
depends on COMMON_CLK
|
|
depends on ARCH_MESON || COMPILE_TEST
|
|
help
|
|
This enables master mode support for the SPICC (SPI communication
|
|
controller) available in Amlogic Meson SoCs.
|
|
|
|
config SPI_MESON_SPIFC
|
|
tristate "Amlogic Meson SPIFC controller"
|
|
depends on ARCH_MESON || COMPILE_TEST
|
|
select REGMAP_MMIO
|
|
help
|
|
This enables master mode support for the SPIFC (SPI flash
|
|
controller) available in Amlogic Meson SoCs.
|
|
|
|
config SPI_MT65XX
|
|
tristate "MediaTek SPI controller"
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
help
|
|
This selects the MediaTek(R) SPI bus driver.
|
|
If you want to use MediaTek(R) SPI interface,
|
|
say Y or M here.If you are not sure, say N.
|
|
SPI drivers for Mediatek MT65XX and MT81XX series ARM SoCs.
|
|
|
|
config SPI_MT7621
|
|
tristate "MediaTek MT7621 SPI Controller"
|
|
depends on RALINK || COMPILE_TEST
|
|
help
|
|
This selects a driver for the MediaTek MT7621 SPI Controller.
|
|
|
|
config SPI_MTK_NOR
|
|
tristate "MediaTek SPI NOR controller"
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
help
|
|
This enables support for SPI NOR controller found on MediaTek
|
|
ARM SoCs. This is a controller specifically for SPI NOR flash.
|
|
It can perform generic SPI transfers up to 6 bytes via generic
|
|
SPI interface as well as several SPI NOR specific instructions
|
|
via SPI MEM interface.
|
|
|
|
config SPI_NPCM_FIU
|
|
tristate "Nuvoton NPCM FLASH Interface Unit"
|
|
depends on ARCH_NPCM || COMPILE_TEST
|
|
depends on OF && HAS_IOMEM
|
|
help
|
|
This enables support for the Flash Interface Unit SPI controller
|
|
in master mode.
|
|
This driver does not support generic SPI. The implementation only
|
|
supports spi-mem interface.
|
|
|
|
config SPI_NPCM_PSPI
|
|
tristate "Nuvoton NPCM PSPI Controller"
|
|
depends on ARCH_NPCM || COMPILE_TEST
|
|
help
|
|
This driver provides support for Nuvoton NPCM BMC
|
|
Peripheral SPI controller in master mode.
|
|
|
|
config SPI_LANTIQ_SSC
|
|
tristate "Lantiq SSC SPI controller"
|
|
depends on LANTIQ || X86 || COMPILE_TEST
|
|
help
|
|
This driver supports the Lantiq SSC SPI controller in master
|
|
mode. This controller is found on Intel (former Lantiq) SoCs like
|
|
the Danube, Falcon, xRX200, xRX300, Lightning Mountain.
|
|
|
|
config SPI_OC_TINY
|
|
tristate "OpenCores tiny SPI"
|
|
depends on GPIOLIB || COMPILE_TEST
|
|
select SPI_BITBANG
|
|
help
|
|
This is the driver for OpenCores tiny SPI master controller.
|
|
|
|
config SPI_OCTEON
|
|
tristate "Cavium OCTEON SPI controller"
|
|
depends on CAVIUM_OCTEON_SOC
|
|
help
|
|
SPI host driver for the hardware found on some Cavium OCTEON
|
|
SOCs.
|
|
|
|
config SPI_OMAP_UWIRE
|
|
tristate "OMAP1 MicroWire"
|
|
depends on ARCH_OMAP1
|
|
select SPI_BITBANG
|
|
help
|
|
This hooks up to the MicroWire controller on OMAP1 chips.
|
|
|
|
config SPI_OMAP24XX
|
|
tristate "McSPI driver for OMAP"
|
|
depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST
|
|
select SG_SPLIT
|
|
help
|
|
SPI master controller for OMAP24XX and later Multichannel SPI
|
|
(McSPI) modules.
|
|
|
|
config SPI_TI_QSPI
|
|
tristate "DRA7xxx QSPI controller support"
|
|
depends on ARCH_OMAP2PLUS || COMPILE_TEST
|
|
help
|
|
QSPI master controller for DRA7xxx used for flash devices.
|
|
This device supports single, dual and quad read support, while
|
|
it only supports single write mode.
|
|
|
|
config SPI_OMAP_100K
|
|
tristate "OMAP SPI 100K"
|
|
depends on ARCH_OMAP850 || ARCH_OMAP730 || COMPILE_TEST
|
|
help
|
|
OMAP SPI 100K master controller for omap7xx boards.
|
|
|
|
config SPI_ORION
|
|
tristate "Orion SPI master"
|
|
depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
|
|
help
|
|
This enables using the SPI master controller on the Orion
|
|
and MVEBU chips.
|
|
|
|
config SPI_PIC32
|
|
tristate "Microchip PIC32 series SPI"
|
|
depends on MACH_PIC32 || COMPILE_TEST
|
|
help
|
|
SPI driver for Microchip PIC32 SPI master controller.
|
|
|
|
config SPI_PIC32_SQI
|
|
tristate "Microchip PIC32 Quad SPI driver"
|
|
depends on MACH_PIC32 || COMPILE_TEST
|
|
help
|
|
SPI driver for PIC32 Quad SPI controller.
|
|
|
|
config SPI_PL022
|
|
tristate "ARM AMBA PL022 SSP controller"
|
|
depends on ARM_AMBA
|
|
default y if ARCH_REALVIEW
|
|
default y if INTEGRATOR_IMPD1
|
|
default y if ARCH_VERSATILE
|
|
help
|
|
This selects the ARM(R) AMBA(R) PrimeCell PL022 SSP
|
|
controller. If you have an embedded system with an AMBA(R)
|
|
bus and a PL022 controller, say Y or M here.
|
|
|
|
config SPI_PPC4xx
|
|
tristate "PPC4xx SPI Controller"
|
|
depends on PPC32 && 4xx
|
|
select SPI_BITBANG
|
|
help
|
|
This selects a driver for the PPC4xx SPI Controller.
|
|
|
|
config SPI_PXA2XX
|
|
tristate "PXA2xx SSP SPI master"
|
|
depends on ARCH_PXA || ARCH_MMP || PCI || ACPI || COMPILE_TEST
|
|
select PXA_SSP if ARCH_PXA || ARCH_MMP
|
|
help
|
|
This enables using a PXA2xx or Sodaville SSP port as a SPI master
|
|
controller. The driver can be configured to use any SSP port and
|
|
additional documentation can be found a Documentation/spi/pxa2xx.rst.
|
|
|
|
config SPI_PXA2XX_PCI
|
|
def_tristate SPI_PXA2XX && PCI && COMMON_CLK
|
|
|
|
config SPI_ROCKCHIP
|
|
tristate "Rockchip SPI controller driver"
|
|
help
|
|
This selects a driver for Rockchip SPI controller.
|
|
|
|
If you say yes to this option, support will be included for
|
|
RK3066, RK3188 and RK3288 families of SPI controller.
|
|
Rockchip SPI controller support DMA transport and PIO mode.
|
|
The main usecase of this controller is to use spi flash as boot
|
|
device.
|
|
|
|
config SPI_ROCKCHIP_SFC
|
|
tristate "Rockchip Serial Flash Controller (SFC)"
|
|
depends on ARCH_ROCKCHIP || COMPILE_TEST
|
|
depends on HAS_IOMEM && HAS_DMA
|
|
help
|
|
This enables support for Rockchip serial flash controller. This
|
|
is a specialized controller used to access SPI flash on some
|
|
Rockchip SOCs.
|
|
|
|
ROCKCHIP SFC supports DMA and PIO modes. When DMA is not available,
|
|
the driver automatically falls back to PIO mode.
|
|
|
|
config SPI_RB4XX
|
|
tristate "Mikrotik RB4XX SPI master"
|
|
depends on SPI_MASTER && ATH79
|
|
help
|
|
SPI controller driver for the Mikrotik RB4xx series boards.
|
|
|
|
config SPI_RPCIF
|
|
tristate "Renesas RPC-IF SPI driver"
|
|
depends on RENESAS_RPCIF
|
|
help
|
|
SPI driver for Renesas R-Car Gen3 or RZ/G2 RPC-IF.
|
|
|
|
config SPI_RSPI
|
|
tristate "Renesas RSPI/QSPI controller"
|
|
depends on SUPERH || ARCH_RENESAS || COMPILE_TEST
|
|
help
|
|
SPI driver for Renesas RSPI and QSPI blocks.
|
|
|
|
config SPI_QCOM_QSPI
|
|
tristate "QTI QSPI controller"
|
|
depends on ARCH_QCOM
|
|
help
|
|
QSPI(Quad SPI) driver for Qualcomm QSPI controller.
|
|
|
|
config SPI_QUP
|
|
tristate "Qualcomm SPI controller with QUP interface"
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
|
help
|
|
Qualcomm Universal Peripheral (QUP) core is an AHB slave that
|
|
provides a common data path (an output FIFO and an input FIFO)
|
|
for serial peripheral interface (SPI) mini-core. SPI in master
|
|
mode supports up to 50MHz, up to four chip selects, programmable
|
|
data path from 4 bits to 32 bits and numerous protocol variants.
|
|
|
|
This driver can also be built as a module. If so, the module
|
|
will be called spi_qup.
|
|
|
|
config SPI_QCOM_GENI
|
|
tristate "Qualcomm GENI based SPI controller"
|
|
depends on QCOM_GENI_SE
|
|
help
|
|
This driver supports GENI serial engine based SPI controller in
|
|
master mode on the Qualcomm Technologies Inc.'s SoCs. If you say
|
|
yes to this option, support will be included for the built-in SPI
|
|
interface on the Qualcomm Technologies Inc.'s SoCs.
|
|
|
|
This driver can also be built as a module. If so, the module
|
|
will be called spi-geni-qcom.
|
|
|
|
config SPI_S3C24XX
|
|
tristate "Samsung S3C24XX series SPI"
|
|
depends on ARCH_S3C24XX
|
|
select SPI_BITBANG
|
|
help
|
|
SPI driver for Samsung S3C24XX series ARM SoCs
|
|
|
|
config SPI_S3C24XX_FIQ
|
|
bool "S3C24XX driver with FIQ pseudo-DMA"
|
|
depends on SPI_S3C24XX
|
|
select FIQ
|
|
help
|
|
Enable FIQ support for the S3C24XX SPI driver to provide pseudo
|
|
DMA by using the fast-interrupt request framework, This allows
|
|
the driver to get DMA-like performance when there are either
|
|
no free DMA channels, or when doing transfers that required both
|
|
TX and RX data paths.
|
|
|
|
config SPI_S3C64XX
|
|
tristate "Samsung S3C64XX/Exynos SoC series type SPI"
|
|
depends on (PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST)
|
|
help
|
|
SPI driver for Samsung S3C64XX, S5Pv210 and Exynos SoCs.
|
|
Choose Y/M here only if you build for such Samsung SoC.
|
|
|
|
config SPI_SC18IS602
|
|
tristate "NXP SC18IS602/602B/603 I2C to SPI bridge"
|
|
depends on I2C
|
|
help
|
|
SPI driver for NXP SC18IS602/602B/603 I2C to SPI bridge.
|
|
|
|
config SPI_SH_MSIOF
|
|
tristate "SuperH MSIOF SPI controller"
|
|
depends on HAVE_CLK
|
|
depends on ARCH_SHMOBILE || ARCH_RENESAS || COMPILE_TEST
|
|
help
|
|
SPI driver for SuperH and SH Mobile MSIOF blocks.
|
|
|
|
config SPI_SH
|
|
tristate "SuperH SPI controller"
|
|
depends on SUPERH || COMPILE_TEST
|
|
help
|
|
SPI driver for SuperH SPI blocks.
|
|
|
|
config SPI_SH_SCI
|
|
tristate "SuperH SCI SPI controller"
|
|
depends on SUPERH
|
|
select SPI_BITBANG
|
|
help
|
|
SPI driver for SuperH SCI blocks.
|
|
|
|
config SPI_SH_HSPI
|
|
tristate "SuperH HSPI controller"
|
|
depends on ARCH_RENESAS || COMPILE_TEST
|
|
help
|
|
SPI driver for SuperH HSPI blocks.
|
|
|
|
config SPI_SIFIVE
|
|
tristate "SiFive SPI controller"
|
|
depends on HAS_IOMEM
|
|
help
|
|
This exposes the SPI controller IP from SiFive.
|
|
|
|
config SPI_SLAVE_MT27XX
|
|
tristate "MediaTek SPI slave device"
|
|
depends on ARCH_MEDIATEK || COMPILE_TEST
|
|
depends on SPI_SLAVE
|
|
help
|
|
This selects the MediaTek(R) SPI slave device driver.
|
|
If you want to use MediaTek(R) SPI slave interface,
|
|
say Y or M here.If you are not sure, say N.
|
|
SPI slave drivers for Mediatek MT27XX series ARM SoCs.
|
|
|
|
config SPI_SPRD
|
|
tristate "Spreadtrum SPI controller"
|
|
depends on ARCH_SPRD || COMPILE_TEST
|
|
help
|
|
SPI driver for Spreadtrum SoCs.
|
|
|
|
config SPI_SPRD_ADI
|
|
tristate "Spreadtrum ADI controller"
|
|
depends on ARCH_SPRD || COMPILE_TEST
|
|
depends on HWSPINLOCK || (COMPILE_TEST && !HWSPINLOCK)
|
|
help
|
|
ADI driver based on SPI for Spreadtrum SoCs.
|
|
|
|
config SPI_STM32
|
|
tristate "STMicroelectronics STM32 SPI controller"
|
|
depends on ARCH_STM32 || COMPILE_TEST
|
|
help
|
|
SPI driver for STMicroelectronics STM32 SoCs.
|
|
|
|
STM32 SPI controller supports DMA and PIO modes. When DMA
|
|
is not available, the driver automatically falls back to
|
|
PIO mode.
|
|
|
|
config SPI_STM32_QSPI
|
|
tristate "STMicroelectronics STM32 QUAD SPI controller"
|
|
depends on ARCH_STM32 || COMPILE_TEST
|
|
depends on OF
|
|
depends on SPI_MEM
|
|
help
|
|
This enables support for the Quad SPI controller in master mode.
|
|
This driver does not support generic SPI. The implementation only
|
|
supports spi-mem interface.
|
|
|
|
config SPI_ST_SSC4
|
|
tristate "STMicroelectronics SPI SSC-based driver"
|
|
depends on ARCH_STI || COMPILE_TEST
|
|
help
|
|
STMicroelectronics SoCs support for SPI. If you say yes to
|
|
this option, support will be included for the SSC driven SPI.
|
|
|
|
config SPI_SUN4I
|
|
tristate "Allwinner A10 SoCs SPI controller"
|
|
depends on ARCH_SUNXI || COMPILE_TEST
|
|
help
|
|
SPI driver for Allwinner sun4i, sun5i and sun7i SoCs
|
|
|
|
config SPI_SUN6I
|
|
tristate "Allwinner A31 SPI controller"
|
|
depends on ARCH_SUNXI || COMPILE_TEST
|
|
depends on RESET_CONTROLLER
|
|
help
|
|
This enables using the SPI controller on the Allwinner A31 SoCs.
|
|
|
|
config SPI_SUNPLUS_SP7021
|
|
tristate "Sunplus SP7021 SPI controller"
|
|
depends on SOC_SP7021 || COMPILE_TEST
|
|
help
|
|
This enables Sunplus SP7021 SPI controller driver on the SP7021 SoCs.
|
|
This driver can also be built as a module. If so, the module will be
|
|
called as spi-sunplus-sp7021.
|
|
|
|
If you have a Sunplus SP7021 platform say Y here.
|
|
If unsure, say N.
|
|
|
|
config SPI_SYNQUACER
|
|
tristate "Socionext's SynQuacer HighSpeed SPI controller"
|
|
depends on ARCH_SYNQUACER || COMPILE_TEST
|
|
help
|
|
SPI driver for Socionext's High speed SPI controller which provides
|
|
various operating modes for interfacing to serial peripheral devices
|
|
that use the de-facto standard SPI protocol.
|
|
|
|
It also supports the new dual-bit and quad-bit SPI protocol.
|
|
|
|
config SPI_MXIC
|
|
tristate "Macronix MX25F0A SPI controller"
|
|
depends on SPI_MASTER
|
|
imply MTD_NAND_ECC_MXIC
|
|
help
|
|
This selects the Macronix MX25F0A SPI controller driver.
|
|
|
|
config SPI_MXS
|
|
tristate "Freescale MXS SPI controller"
|
|
depends on ARCH_MXS
|
|
select STMP_DEVICE
|
|
help
|
|
SPI driver for Freescale MXS devices.
|
|
|
|
config SPI_TEGRA210_QUAD
|
|
tristate "NVIDIA Tegra QSPI Controller"
|
|
depends on ARCH_TEGRA || COMPILE_TEST
|
|
depends on RESET_CONTROLLER
|
|
help
|
|
QSPI driver for NVIDIA Tegra QSPI Controller interface. This
|
|
controller is different from the SPI controller and is available
|
|
on Tegra SoCs starting from Tegra210.
|
|
|
|
config SPI_TEGRA114
|
|
tristate "NVIDIA Tegra114 SPI Controller"
|
|
depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
|
|
depends on RESET_CONTROLLER
|
|
help
|
|
SPI driver for NVIDIA Tegra114 SPI Controller interface. This controller
|
|
is different than the older SoCs SPI controller and also register interface
|
|
get changed with this controller.
|
|
|
|
config SPI_TEGRA20_SFLASH
|
|
tristate "Nvidia Tegra20 Serial flash Controller"
|
|
depends on ARCH_TEGRA || COMPILE_TEST
|
|
depends on RESET_CONTROLLER
|
|
help
|
|
SPI driver for Nvidia Tegra20 Serial flash Controller interface.
|
|
The main usecase of this controller is to use spi flash as boot
|
|
device.
|
|
|
|
config SPI_TEGRA20_SLINK
|
|
tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
|
|
depends on (ARCH_TEGRA && TEGRA20_APB_DMA) || COMPILE_TEST
|
|
depends on RESET_CONTROLLER
|
|
help
|
|
SPI driver for Nvidia Tegra20/Tegra30 SLINK Controller interface.
|
|
|
|
config SPI_THUNDERX
|
|
tristate "Cavium ThunderX SPI controller"
|
|
depends on PCI && 64BIT && (ARM64 || COMPILE_TEST)
|
|
help
|
|
SPI host driver for the hardware found on Cavium ThunderX
|
|
SOCs.
|
|
|
|
config SPI_TOPCLIFF_PCH
|
|
tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
|
|
depends on PCI && (X86_32 || MIPS || COMPILE_TEST)
|
|
help
|
|
SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
|
|
used in some x86 embedded processors.
|
|
|
|
This driver also supports the ML7213/ML7223/ML7831, a companion chip
|
|
for the Atom E6xx series and compatible with the Intel EG20T PCH.
|
|
|
|
config SPI_UNIPHIER
|
|
tristate "Socionext UniPhier SPI Controller"
|
|
depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
|
|
depends on HAS_IOMEM
|
|
help
|
|
This enables a driver for the Socionext UniPhier SoC SCSSI SPI controller.
|
|
|
|
UniPhier SoCs have SCSSI and MCSSI SPI controllers.
|
|
Every UniPhier SoC has SCSSI which supports single channel.
|
|
Older UniPhier Pro4/Pro5 also has MCSSI which support multiple channels.
|
|
This driver supports SCSSI only.
|
|
|
|
If your SoC supports SCSSI, say Y here.
|
|
|
|
config SPI_XCOMM
|
|
tristate "Analog Devices AD-FMCOMMS1-EBZ SPI-I2C-bridge driver"
|
|
depends on I2C
|
|
help
|
|
Support for the SPI-I2C bridge found on the Analog Devices
|
|
AD-FMCOMMS1-EBZ board.
|
|
|
|
config SPI_XILINX
|
|
tristate "Xilinx SPI controller common module"
|
|
depends on HAS_IOMEM
|
|
select SPI_BITBANG
|
|
help
|
|
This exposes the SPI controller IP from the Xilinx EDK.
|
|
|
|
See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
|
|
Product Specification document (DS464) for hardware details.
|
|
|
|
Or for the DS570, see "XPS Serial Peripheral Interface (SPI) (v2.00b)"
|
|
|
|
config SPI_XLP
|
|
tristate "Cavium ThunderX2 SPI controller driver"
|
|
depends on ARCH_THUNDER2 || COMPILE_TEST
|
|
help
|
|
Enable support for the SPI controller on the Cavium ThunderX2.
|
|
(Originally on Netlogic XLP SoCs.)
|
|
|
|
If you have a Cavium ThunderX2 platform say Y here.
|
|
If unsure, say N.
|
|
|
|
config SPI_XTENSA_XTFPGA
|
|
tristate "Xtensa SPI controller for xtfpga"
|
|
depends on (XTENSA && XTENSA_PLATFORM_XTFPGA) || COMPILE_TEST
|
|
select SPI_BITBANG
|
|
help
|
|
SPI driver for xtfpga SPI master controller.
|
|
|
|
This simple SPI master controller is built into xtfpga bitstreams
|
|
and is used to control daughterboard audio codec. It always transfers
|
|
16 bit words in SPI mode 0, automatically asserting CS on transfer
|
|
start and deasserting on end.
|
|
|
|
config SPI_ZYNQ_QSPI
|
|
tristate "Xilinx Zynq QSPI controller"
|
|
depends on ARCH_ZYNQ || COMPILE_TEST
|
|
help
|
|
This enables support for the Zynq Quad SPI controller
|
|
in master mode.
|
|
This controller only supports SPI memory interface.
|
|
|
|
config SPI_ZYNQMP_GQSPI
|
|
tristate "Xilinx ZynqMP GQSPI controller"
|
|
depends on (SPI_MASTER && HAS_DMA) || COMPILE_TEST
|
|
help
|
|
Enables Xilinx GQSPI controller driver for Zynq UltraScale+ MPSoC.
|
|
|
|
config SPI_AMD
|
|
tristate "AMD SPI controller"
|
|
depends on SPI_MASTER || COMPILE_TEST
|
|
help
|
|
Enables SPI controller driver for AMD SoC.
|
|
|
|
#
|
|
# Add new SPI master controllers in alphabetical order above this line
|
|
#
|
|
|
|
comment "SPI Multiplexer support"
|
|
|
|
config SPI_MUX
|
|
tristate "SPI multiplexer support"
|
|
select MULTIPLEXER
|
|
help
|
|
This adds support for SPI multiplexers. Each SPI mux will be
|
|
accessible as a SPI controller, the devices behind the mux will appear
|
|
to be chip selects on this controller. It is still necessary to
|
|
select one or more specific mux-controller drivers.
|
|
|
|
#
|
|
# There are lots of SPI device types, with sensors and memory
|
|
# being probably the most widely used ones.
|
|
#
|
|
comment "SPI Protocol Masters"
|
|
|
|
config SPI_SPIDEV
|
|
tristate "User mode SPI device driver support"
|
|
help
|
|
This supports user mode SPI protocol drivers.
|
|
|
|
Note that this application programming interface is EXPERIMENTAL
|
|
and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
|
|
|
|
config SPI_LOOPBACK_TEST
|
|
tristate "spi loopback test framework support"
|
|
depends on m
|
|
help
|
|
This enables the SPI loopback testing framework driver
|
|
|
|
primarily used for development of spi_master drivers
|
|
and to detect regressions
|
|
|
|
config SPI_TLE62X0
|
|
tristate "Infineon TLE62X0 (for power switching)"
|
|
depends on SYSFS
|
|
help
|
|
SPI driver for Infineon TLE62X0 series line driver chips,
|
|
such as the TLE6220, TLE6230 and TLE6240. This provides a
|
|
sysfs interface, with each line presented as a kind of GPIO
|
|
exposing both switch control and diagnostic feedback.
|
|
|
|
#
|
|
# Add new SPI protocol masters in alphabetical order above this line
|
|
#
|
|
|
|
endif # SPI_MASTER
|
|
|
|
#
|
|
# SLAVE side ... listening to other SPI masters
|
|
#
|
|
|
|
config SPI_SLAVE
|
|
bool "SPI slave protocol handlers"
|
|
help
|
|
If your system has a slave-capable SPI controller, you can enable
|
|
slave protocol handlers.
|
|
|
|
if SPI_SLAVE
|
|
|
|
config SPI_SLAVE_TIME
|
|
tristate "SPI slave handler reporting boot up time"
|
|
help
|
|
SPI slave handler responding with the time of reception of the last
|
|
SPI message.
|
|
|
|
config SPI_SLAVE_SYSTEM_CONTROL
|
|
tristate "SPI slave handler controlling system state"
|
|
help
|
|
SPI slave handler to allow remote control of system reboot, power
|
|
off, halt, and suspend.
|
|
|
|
endif # SPI_SLAVE
|
|
|
|
config SPI_DYNAMIC
|
|
def_bool ACPI || OF_DYNAMIC || SPI_SLAVE
|
|
|
|
endif # SPI
|