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MIPS has up until now had 3 different ways for a task's floating point
context to be initialized:
- If the task's first use of FP involves it gaining ownership of an
FPU then _init_fpu() is used to initialize the FPU's registers such
that they all contain ~0, and the FPU registers will be stored to
struct thread_info later (eg. when context switching).
- If the task first uses FP on a CPU without an associated FPU then
fpu_emulator_init_fpu() initializes the task's floating point
register state in struct thread_info such that all floating point
register contain the bit pattern 0x7ff800007ff80000, different to
the _init_fpu() behaviour.
- If a task's floating point context is first accessed via ptrace then
init_fp_ctx() initializes the floating point register state in
struct thread_info to ~0, giving equivalent state to _init_fpu().
The _init_fpu() path has 2 separate implementations - one for r2k/r3k
style systems & one for r4k style systems. The _init_fpu() path also
requires that we be careful to clear & restore the value of the
Config5.FRE bit on modern systems in order to avoid inadvertently
triggering floating point exceptions.
None of this code is in a performance critical hot path - it runs only
the first time a task uses floating point. As such it doesn't seem to
warrant the complications of maintaining the _init_fpu() path.
Remove _init_fpu() & fpu_emulator_init_fpu(), instead using
init_fp_ctx() consistently to initialize floating point register state
in struct thread_info. Upon a task's first use of floating point this
will typically mean that we initialize state in memory & then load it
into FPU registers using _restore_fp() just as we would on a context
switch. For other paths such as __compute_return_epc_for_insn() or
mipsr2_decoder() this results in a significant simplification of the
work to be done.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21002/
Cc: linux-mips@linux-mips.org
62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2014 Lemote Corporation.
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* written by Huacai Chen <chenhc@lemote.com>
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*
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* based on arch/mips/cavium-octeon/cpu.c
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* Copyright (C) 2009 Wind River Systems,
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/notifier.h>
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#include <linux/ptrace.h>
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#include <asm/fpu.h>
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#include <asm/cop2.h>
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#include <asm/current.h>
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#include <asm/mipsregs.h>
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static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
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void *data)
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{
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int fpu_owned;
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int fr = !test_thread_flag(TIF_32BIT_FPREGS);
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switch (action) {
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case CU2_EXCEPTION:
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preempt_disable();
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fpu_owned = __is_fpu_owner();
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if (!fr)
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set_c0_status(ST0_CU1 | ST0_CU2);
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else
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set_c0_status(ST0_CU1 | ST0_CU2 | ST0_FR);
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enable_fpu_hazard();
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KSTK_STATUS(current) |= (ST0_CU1 | ST0_CU2);
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if (fr)
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KSTK_STATUS(current) |= ST0_FR;
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else
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KSTK_STATUS(current) &= ~ST0_FR;
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/* If FPU is owned, we needn't init or restore fp */
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if (!fpu_owned) {
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set_thread_flag(TIF_USEDFPU);
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init_fp_ctx(current);
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_restore_fp(current);
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}
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preempt_enable();
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return NOTIFY_STOP; /* Don't call default notifier */
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}
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return NOTIFY_OK; /* Let default notifier send signals */
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}
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static int __init loongson_cu2_setup(void)
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{
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return cu2_notifier(loongson_cu2_call, 0);
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}
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early_initcall(loongson_cu2_setup);
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