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11801e9de2
Most notable here is probably the addition of basic support for the BCM2835, an SoC used in some of the Roku 2 players as well as the much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren. It's still early days on mainline support, with just the basics working. But it has to start somewhere! Beyond that there's some conversions of clock infrastructure on tegra to common clock, misc updates for several other platforms, and OMAP now has its own bus (under drivers/bus) to manage its devices through. This branch adds two new directories outside of arch/arm: drivers/irqchip for new irq controllers, and drivers/bus for the above OMAP bus. It's expected that some of the other platforms will migrate parts of their platforms to those directories over time as well. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQaO2SAAoJEIwa5zzehBx3TBIQAJYc+vpAqiv8MLQ1XV3cLiIP X57fxM9u1A+uXpXsiCTGR+ga8W4a5tlfGMXDBnl/K2bnFs2x11b9NkFLDJ7mdkih J4c/iOWT/mT5suLnnybyg6ZGaxGkAKou2AumiSmkazmq5hGG67hkpAOqFEfDK0J2 Au7/6VN6GZXgiwt8nYaAB/qR5NVcww4m/6GQ2looaWgRLT/wgC3W2ZKvw6zEdl2J OxOpwf2ujG/75zLQaxTeZ5rKnGtAXH4v0KhY9CWQacQPi4L2MVCrvUrDB4j0as4H Wmsu7g6fZA9Vlf1aW/mlDY1ftozfbDaKORoYVS+CsWhm1oiQI5t+sAWRTkbbS85t pobgKfFdvNsl9kS1zRdEddK2tyotwtXh2jz+P/s1l95hfqZ8IdVBJNMlcrHRINOI 2iQXFfGRhCCqMcfFiGXJ43tYja/aCsaIc4M5TrEma57czZT5jK8HSLh0ZUmFYDoe /TfUegVhFASmkNTk7dVZgZ2UoQVkv4lWs+xuf8YgX3UalWgl/YIRRFl4NnylGlEc jjrX3MjXATqXzLPEZaf8dRZHIpB6FYmZq1QqaoefcUQ46gBOueThElZP3sNWR8a2 MOtknauLfLwQbrcH5CmqKpIpXTB4LKgbf/omH2jQlxBhQ5t7PXHVD1NFsbZbwM8J RVCZb4PwqEwOt/wibTrk =BCp4 -----END PGP SIGNATURE----- Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM soc-specific updates from Olof Johansson: "Most notable here is probably the addition of basic support for the BCM2835, an SoC used in some of the Roku 2 players as well as the much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren. It's still early days on mainline support, with just the basics working. But it has to start somewhere! Beyond that there's some conversions of clock infrastructure on tegra to common clock, misc updates for several other platforms, and OMAP now has its own bus (under drivers/bus) to manage its devices through. This branch adds two new directories outside of arch/arm: drivers/irqchip for new irq controllers, and drivers/bus for the above OMAP bus. It's expected that some of the other platforms will migrate parts of their platforms to those directories over time as well." Fix up trivial conflicts with the clk infrastructure changes. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (62 commits) ARM: shmobile: add new __iomem annotation for new code ARM: LPC32xx: Support GPI 28 ARM: LPC32xx: Platform update for devicetree completion of spi-pl022 ARM: LPC32xx: Board cleanup irqchip: fill in empty Kconfig ARM: SAMSUNG: Add check for NULL in clock interface ARM: EXYNOS: Put PCM, Slimbus, Spdif clocks to off state ARM: EXYNOS: Add bus clock for FIMD ARM: SAMSUNG: Fix HDMI related warnings ARM: S3C24XX: Add .get_rate callback for "camif-upll" clock ARM: EXYNOS: Fix incorrect help text ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data move MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture ARM: bcm2835: instantiate console UART ARM: bcm2835: add stub clock driver ARM: bcm2835: add system timer ARM: bcm2835: add interrupt controller driver ARM: add infra-structure for BCM2835 and Raspberry Pi ARM: tegra20: add CPU hotplug support ...
260 lines
6.8 KiB
C
260 lines
6.8 KiB
C
/*
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* Copyright (C) 2008-2009 ST-Ericsson SA
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*
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* Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2, as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mfd/abx500/ab8500.h>
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#include <asm/pmu.h>
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#include <asm/mach/map.h>
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#include <plat/gpio-nomadik.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/devices.h>
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#include <mach/usb.h>
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#include <mach/db8500-regs.h>
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#include "devices-db8500.h"
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#include "ste-dma40-db8500.h"
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/* minimum static i/o mapping required to boot U8500 platforms */
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static struct map_desc u8500_uart_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
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};
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/* U8500 and U9540 common io_desc */
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static struct map_desc u8500_common_io_desc[] __initdata = {
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/* SCU base also covers GIC CPU BASE and TWD with its 4K page */
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__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
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__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
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};
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/* U8500 IO map specific description */
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static struct map_desc u8500_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
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__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
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};
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/* U9540 IO map specific description */
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static struct map_desc u9540_io_desc[] __initdata = {
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__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
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__IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
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};
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void __init u8500_map_io(void)
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{
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/*
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* Map the UARTs early so that the DEBUG_LL stuff continues to work.
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*/
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iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
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ux500_map_io();
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iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
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if (cpu_is_ux540_family())
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iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
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else
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iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
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_PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
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}
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static struct resource db8500_pmu_resources[] = {
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[0] = {
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.start = IRQ_DB8500_PMU,
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.end = IRQ_DB8500_PMU,
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.flags = IORESOURCE_IRQ,
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},
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};
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/*
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* The PMU IRQ lines of two cores are wired together into a single interrupt.
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* Bounce the interrupt to the other core if it's not ours.
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*/
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static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
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{
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irqreturn_t ret = handler(irq, dev);
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int other = !smp_processor_id();
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if (ret == IRQ_NONE && cpu_online(other))
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irq_set_affinity(irq, cpumask_of(other));
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/*
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* We should be able to get away with the amount of IRQ_NONEs we give,
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* while still having the spurious IRQ detection code kick in if the
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* interrupt really starts hitting spuriously.
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*/
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return ret;
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}
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struct arm_pmu_platdata db8500_pmu_platdata = {
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.handle_irq = db8500_pmu_handler,
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};
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static struct platform_device db8500_pmu_device = {
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.name = "arm-pmu",
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.id = -1,
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.num_resources = ARRAY_SIZE(db8500_pmu_resources),
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.resource = db8500_pmu_resources,
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.dev.platform_data = &db8500_pmu_platdata,
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};
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static struct platform_device db8500_prcmu_device = {
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.name = "db8500-prcmu",
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};
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static struct platform_device *platform_devs[] __initdata = {
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&u8500_dma40_device,
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&db8500_pmu_device,
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&db8500_prcmu_device,
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};
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static struct platform_device *of_platform_devs[] __initdata = {
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&u8500_dma40_device,
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};
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static resource_size_t __initdata db8500_gpio_base[] = {
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U8500_GPIOBANK0_BASE,
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U8500_GPIOBANK1_BASE,
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U8500_GPIOBANK2_BASE,
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U8500_GPIOBANK3_BASE,
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U8500_GPIOBANK4_BASE,
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U8500_GPIOBANK5_BASE,
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U8500_GPIOBANK6_BASE,
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U8500_GPIOBANK7_BASE,
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U8500_GPIOBANK8_BASE,
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};
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static void __init db8500_add_gpios(struct device *parent)
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{
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struct nmk_gpio_platform_data pdata = {
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.supports_sleepmode = true,
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};
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dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
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IRQ_DB8500_GPIO0, &pdata);
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dbx500_add_pinctrl(parent, "pinctrl-db8500");
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}
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static int usb_db8500_rx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_IEP_8
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};
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static int usb_db8500_tx_dma_cfg[] = {
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DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
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DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
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DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
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DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
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DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
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DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
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DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
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DB8500_DMA_DEV39_USB_OTG_OEP_8
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};
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static const char *db8500_read_soc_id(void)
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{
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void __iomem *uid = __io_address(U8500_BB_UID_BASE);
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return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
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readl((u32 *)uid+1),
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readl((u32 *)uid+1), readl((u32 *)uid+2),
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readl((u32 *)uid+3), readl((u32 *)uid+4));
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}
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static struct device * __init db8500_soc_device_init(void)
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{
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const char *soc_id = db8500_read_soc_id();
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return ux500_soc_device_init(soc_id);
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}
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/*
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* This function is called from the board init
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*/
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struct device * __init u8500_init_devices(struct ab8500_platform_data *ab8500)
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{
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struct device *parent;
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int i;
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parent = db8500_soc_device_init();
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db8500_add_rtc(parent);
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db8500_add_gpios(parent);
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db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
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platform_device_register_data(parent,
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"cpufreq-u8500", -1, NULL, 0);
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for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
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platform_devs[i]->dev.parent = parent;
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db8500_prcmu_device.dev.platform_data = ab8500;
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platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
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return parent;
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}
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/* TODO: Once all pieces are DT:ed, remove completely. */
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struct device * __init u8500_of_init_devices(void)
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{
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struct device *parent;
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int i;
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parent = db8500_soc_device_init();
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db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
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platform_device_register_data(parent,
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"cpufreq-u8500", -1, NULL, 0);
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for (i = 0; i < ARRAY_SIZE(of_platform_devs); i++)
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of_platform_devs[i]->dev.parent = parent;
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/*
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* Devices to be DT:ed:
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* u8500_dma40_device = todo
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* db8500_pmu_device = done
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* db8500_prcmu_device = done
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*/
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platform_add_devices(of_platform_devs, ARRAY_SIZE(of_platform_devs));
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return parent;
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}
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