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1dd4e5991c
The patch replaces magic numbers with macros defined in DT header in exynos5420 clock bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
42 lines
1.3 KiB
Plaintext
42 lines
1.3 KiB
Plaintext
* Samsung Exynos5420 Clock Controller
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The Exynos5420 clock controller generates and supplies clock to various
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controllers within the Exynos5420 SoC.
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Required Properties:
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- compatible: should be one of the following.
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- "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC.
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- reg: physical base address of the controller and length of memory mapped
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region.
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- #clock-cells: should be 1.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume.
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All available clocks are defined as preprocessor macros in
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dt-bindings/clock/exynos5420.h header and can be used in device
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tree sources.
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Example 1: An example of a clock controller node is listed below.
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clock: clock-controller@0x10010000 {
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compatible = "samsung,exynos5420-clock";
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reg = <0x10010000 0x30000>;
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#clock-cells = <1>;
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};
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Example 2: UART controller node that consumes the clock generated by the clock
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controller. Refer to the standard clock bindings for information
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about 'clocks' and 'clock-names' property.
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serial@13820000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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};
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