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5fb6b06d4e
In Falcon we can configure the fill levels of the RX data FIFO which trigger the generation of pause frames (if enabled), and we have module parameters for this. Siena does not allow the levels to be configured (or, if it does, this is done by the MC firmware and is not configurable by drivers). So far as I can tell, the module parameters are not used by our internal scripts and have not been documented (with the exception of the short parameter descriptions). Therefore, remove them and always initialise Falcon with the default values. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
271 lines
8.5 KiB
C
271 lines
8.5 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2006 Fen Systems Ltd.
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* Copyright 2006-2011 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_NIC_H
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#define EFX_NIC_H
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#include <linux/i2c-algo-bit.h>
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#include "net_driver.h"
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#include "efx.h"
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#include "mcdi.h"
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#include "spi.h"
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/*
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* Falcon hardware control
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*/
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enum {
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EFX_REV_FALCON_A0 = 0,
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EFX_REV_FALCON_A1 = 1,
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EFX_REV_FALCON_B0 = 2,
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EFX_REV_SIENA_A0 = 3,
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};
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static inline int efx_nic_rev(struct efx_nic *efx)
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{
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return efx->type->revision;
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}
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extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
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static inline bool efx_nic_has_mc(struct efx_nic *efx)
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{
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return efx_nic_rev(efx) >= EFX_REV_SIENA_A0;
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}
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/* NIC has two interlinked PCI functions for the same port. */
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static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
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{
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return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
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}
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enum {
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PHY_TYPE_NONE = 0,
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PHY_TYPE_TXC43128 = 1,
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PHY_TYPE_88E1111 = 2,
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PHY_TYPE_SFX7101 = 3,
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PHY_TYPE_QT2022C2 = 4,
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PHY_TYPE_PM8358 = 6,
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PHY_TYPE_SFT9001A = 8,
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PHY_TYPE_QT2025C = 9,
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PHY_TYPE_SFT9001B = 10,
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};
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#define FALCON_XMAC_LOOPBACKS \
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((1 << LOOPBACK_XGMII) | \
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(1 << LOOPBACK_XGXS) | \
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(1 << LOOPBACK_XAUI))
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#define FALCON_GMAC_LOOPBACKS \
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(1 << LOOPBACK_GMAC)
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/**
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* struct falcon_board_type - board operations and type information
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* @id: Board type id, as found in NVRAM
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* @ref_model: Model number of Solarflare reference design
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* @gen_type: Generic board type description
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* @init: Allocate resources and initialise peripheral hardware
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* @init_phy: Do board-specific PHY initialisation
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* @fini: Shut down hardware and free resources
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* @set_id_led: Set state of identifying LED or revert to automatic function
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* @monitor: Board-specific health check function
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*/
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struct falcon_board_type {
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u8 id;
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const char *ref_model;
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const char *gen_type;
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int (*init) (struct efx_nic *nic);
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void (*init_phy) (struct efx_nic *efx);
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void (*fini) (struct efx_nic *nic);
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void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
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int (*monitor) (struct efx_nic *nic);
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};
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/**
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* struct falcon_board - board information
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* @type: Type of board
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* @major: Major rev. ('A', 'B' ...)
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* @minor: Minor rev. (0, 1, ...)
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* @i2c_adap: I2C adapter for on-board peripherals
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* @i2c_data: Data for bit-banging algorithm
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* @hwmon_client: I2C client for hardware monitor
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* @ioexp_client: I2C client for power/port control
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*/
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struct falcon_board {
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const struct falcon_board_type *type;
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int major;
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int minor;
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struct i2c_adapter i2c_adap;
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struct i2c_algo_bit_data i2c_data;
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struct i2c_client *hwmon_client, *ioexp_client;
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};
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/**
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* struct falcon_nic_data - Falcon NIC state
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* @pci_dev2: Secondary function of Falcon A
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* @board: Board state and functions
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* @stats_disable_count: Nest count for disabling statistics fetches
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* @stats_pending: Is there a pending DMA of MAC statistics.
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* @stats_timer: A timer for regularly fetching MAC statistics.
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* @stats_dma_done: Pointer to the flag which indicates DMA completion.
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* @spi_flash: SPI flash device
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* @spi_eeprom: SPI EEPROM device
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* @spi_lock: SPI bus lock
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* @mdio_lock: MDIO bus lock
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* @xmac_poll_required: XMAC link state needs polling
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*/
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struct falcon_nic_data {
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struct pci_dev *pci_dev2;
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struct falcon_board board;
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unsigned int stats_disable_count;
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bool stats_pending;
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struct timer_list stats_timer;
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u32 *stats_dma_done;
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struct efx_spi_device spi_flash;
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struct efx_spi_device spi_eeprom;
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struct mutex spi_lock;
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struct mutex mdio_lock;
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bool xmac_poll_required;
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};
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static inline struct falcon_board *falcon_board(struct efx_nic *efx)
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{
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struct falcon_nic_data *data = efx->nic_data;
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return &data->board;
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}
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/**
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* struct siena_nic_data - Siena NIC state
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* @mcdi: Management-Controller-to-Driver Interface
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* @wol_filter_id: Wake-on-LAN packet filter id
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*/
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struct siena_nic_data {
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struct efx_mcdi_iface mcdi;
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int wol_filter_id;
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};
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extern struct efx_nic_type falcon_a1_nic_type;
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extern struct efx_nic_type falcon_b0_nic_type;
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extern struct efx_nic_type siena_a0_nic_type;
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/**************************************************************************
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*
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* Externs
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*
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**************************************************************************
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*/
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extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
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/* TX data path */
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extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
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extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
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extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
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extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
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extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
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/* RX data path */
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extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
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extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
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extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
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extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
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extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
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/* Event data path */
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extern int efx_nic_probe_eventq(struct efx_channel *channel);
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extern void efx_nic_init_eventq(struct efx_channel *channel);
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extern void efx_nic_fini_eventq(struct efx_channel *channel);
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extern void efx_nic_remove_eventq(struct efx_channel *channel);
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extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
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extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
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/* MAC/PHY */
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extern void falcon_drain_tx_fifo(struct efx_nic *efx);
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extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
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/* Interrupts and test events */
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extern int efx_nic_init_interrupt(struct efx_nic *efx);
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extern void efx_nic_enable_interrupts(struct efx_nic *efx);
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extern void efx_nic_generate_test_event(struct efx_channel *channel);
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extern void efx_nic_generate_fill_event(struct efx_channel *channel);
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extern void efx_nic_generate_interrupt(struct efx_nic *efx);
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extern void efx_nic_disable_interrupts(struct efx_nic *efx);
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extern void efx_nic_fini_interrupt(struct efx_nic *efx);
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extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
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extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
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extern void falcon_irq_ack_a1(struct efx_nic *efx);
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#define EFX_IRQ_MOD_RESOLUTION 5
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/* Global Resources */
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extern int efx_nic_flush_queues(struct efx_nic *efx);
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extern void falcon_start_nic_stats(struct efx_nic *efx);
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extern void falcon_stop_nic_stats(struct efx_nic *efx);
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extern void falcon_setup_xaui(struct efx_nic *efx);
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extern int falcon_reset_xaui(struct efx_nic *efx);
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extern void efx_nic_init_common(struct efx_nic *efx);
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extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
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int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
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unsigned int len);
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void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
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/* Tests */
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struct efx_nic_register_test {
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unsigned address;
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efx_oword_t mask;
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};
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extern int efx_nic_test_registers(struct efx_nic *efx,
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const struct efx_nic_register_test *regs,
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size_t n_regs);
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extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
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extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
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/**************************************************************************
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*
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* Falcon MAC stats
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*
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**************************************************************************
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*/
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#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
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#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
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/* Retrieve statistic from statistics block */
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#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
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if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
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(efx)->mac_stats.efx_stat += le16_to_cpu( \
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*((__force __le16 *) \
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(efx->stats_buffer.addr + \
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FALCON_STAT_OFFSET(falcon_stat)))); \
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else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
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(efx)->mac_stats.efx_stat += le32_to_cpu( \
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*((__force __le32 *) \
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(efx->stats_buffer.addr + \
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FALCON_STAT_OFFSET(falcon_stat)))); \
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else \
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(efx)->mac_stats.efx_stat += le64_to_cpu( \
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*((__force __le64 *) \
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(efx->stats_buffer.addr + \
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FALCON_STAT_OFFSET(falcon_stat)))); \
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} while (0)
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#define FALCON_MAC_STATS_SIZE 0x100
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#define MAC_DATA_LBN 0
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#define MAC_DATA_WIDTH 32
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extern void efx_nic_generate_event(struct efx_channel *channel,
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efx_qword_t *event);
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extern void falcon_poll_xmac(struct efx_nic *efx);
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#endif /* EFX_NIC_H */
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