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10a104c0de
Add backward compatibility code to enable variable size WQEs only if the user lib supports it. Link: https://patch.msgid.link/r/1724042847-1481-6-git-send-email-selvin.xavier@broadcom.com Signed-off-by: Hongguang Gao <hongguang.gao@broadcom.com> Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
213 lines
5.4 KiB
C
213 lines
5.4 KiB
C
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
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/*
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* Broadcom NetXtreme-E RoCE driver.
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*
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* Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term
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* Broadcom refers to Broadcom Limited and/or its subsidiaries.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* BSD license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS''
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Description: Uverbs ABI header file
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*/
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#ifndef __BNXT_RE_UVERBS_ABI_H__
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#define __BNXT_RE_UVERBS_ABI_H__
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#include <linux/types.h>
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#include <rdma/ib_user_ioctl_cmds.h>
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#define BNXT_RE_ABI_VERSION 1
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#define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00
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#define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10
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#define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18
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enum {
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BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL,
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BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL,
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BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL,
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BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED = 0x08ULL,
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BNXT_RE_UCNTX_CMASK_POW2_DISABLED = 0x10ULL,
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BNXT_RE_UCNTX_CMASK_MSN_TABLE_ENABLED = 0x40,
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};
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enum bnxt_re_wqe_mode {
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BNXT_QPLIB_WQE_MODE_STATIC = 0x00,
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BNXT_QPLIB_WQE_MODE_VARIABLE = 0x01,
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BNXT_QPLIB_WQE_MODE_INVALID = 0x02,
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};
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enum {
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BNXT_RE_COMP_MASK_REQ_UCNTX_POW2_SUPPORT = 0x01,
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BNXT_RE_COMP_MASK_REQ_UCNTX_VAR_WQE_SUPPORT = 0x02,
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};
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struct bnxt_re_uctx_req {
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__aligned_u64 comp_mask;
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};
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struct bnxt_re_uctx_resp {
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__u32 dev_id;
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__u32 max_qp;
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__u32 pg_size;
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__u32 cqe_sz;
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__u32 max_cqd;
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__u32 rsvd;
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__aligned_u64 comp_mask;
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__u32 chip_id0;
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__u32 chip_id1;
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__u32 mode;
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__u32 rsvd1; /* padding */
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};
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/*
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* This struct is placed after the ib_uverbs_alloc_pd_resp struct, which is
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* not 8 byted aligned. To avoid undesired padding in various cases we have to
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* set this struct to packed.
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*/
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struct bnxt_re_pd_resp {
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__u32 pdid;
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__u32 dpi;
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__u64 dbr;
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} __attribute__((packed, aligned(4)));
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struct bnxt_re_cq_req {
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__aligned_u64 cq_va;
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__aligned_u64 cq_handle;
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};
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enum bnxt_re_cq_mask {
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BNXT_RE_CQ_TOGGLE_PAGE_SUPPORT = 0x1,
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};
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struct bnxt_re_cq_resp {
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__u32 cqid;
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__u32 tail;
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__u32 phase;
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__u32 rsvd;
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__aligned_u64 comp_mask;
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};
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struct bnxt_re_resize_cq_req {
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__aligned_u64 cq_va;
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};
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enum bnxt_re_qp_mask {
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BNXT_RE_QP_REQ_MASK_VAR_WQE_SQ_SLOTS = 0x1,
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};
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struct bnxt_re_qp_req {
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__aligned_u64 qpsva;
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__aligned_u64 qprva;
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__aligned_u64 qp_handle;
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__aligned_u64 comp_mask;
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__u32 sq_slots;
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};
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struct bnxt_re_qp_resp {
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__u32 qpid;
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__u32 rsvd;
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};
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struct bnxt_re_srq_req {
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__aligned_u64 srqva;
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__aligned_u64 srq_handle;
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};
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struct bnxt_re_srq_resp {
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__u32 srqid;
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};
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enum bnxt_re_shpg_offt {
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BNXT_RE_BEG_RESV_OFFT = 0x00,
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BNXT_RE_AVID_OFFT = 0x10,
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BNXT_RE_AVID_SIZE = 0x04,
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BNXT_RE_END_RESV_OFFT = 0xFF0
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};
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enum bnxt_re_objects {
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BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
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BNXT_RE_OBJECT_NOTIFY_DRV,
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BNXT_RE_OBJECT_GET_TOGGLE_MEM,
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};
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enum bnxt_re_alloc_page_type {
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BNXT_RE_ALLOC_WC_PAGE = 0,
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BNXT_RE_ALLOC_DBR_BAR_PAGE,
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BNXT_RE_ALLOC_DBR_PAGE,
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};
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enum bnxt_re_var_alloc_page_attrs {
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BNXT_RE_ALLOC_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
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BNXT_RE_ALLOC_PAGE_TYPE,
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BNXT_RE_ALLOC_PAGE_DPI,
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BNXT_RE_ALLOC_PAGE_MMAP_OFFSET,
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BNXT_RE_ALLOC_PAGE_MMAP_LENGTH,
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};
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enum bnxt_re_alloc_page_attrs {
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BNXT_RE_DESTROY_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
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};
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enum bnxt_re_alloc_page_methods {
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BNXT_RE_METHOD_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT),
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BNXT_RE_METHOD_DESTROY_PAGE,
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};
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enum bnxt_re_notify_drv_methods {
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BNXT_RE_METHOD_NOTIFY_DRV = (1U << UVERBS_ID_NS_SHIFT),
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};
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/* Toggle mem */
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enum bnxt_re_get_toggle_mem_type {
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BNXT_RE_CQ_TOGGLE_MEM = 0,
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BNXT_RE_SRQ_TOGGLE_MEM,
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};
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enum bnxt_re_var_toggle_mem_attrs {
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BNXT_RE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
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BNXT_RE_TOGGLE_MEM_TYPE,
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BNXT_RE_TOGGLE_MEM_RES_ID,
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BNXT_RE_TOGGLE_MEM_MMAP_PAGE,
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BNXT_RE_TOGGLE_MEM_MMAP_OFFSET,
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BNXT_RE_TOGGLE_MEM_MMAP_LENGTH,
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};
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enum bnxt_re_toggle_mem_attrs {
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BNXT_RE_RELEASE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT),
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};
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enum bnxt_re_toggle_mem_methods {
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BNXT_RE_METHOD_GET_TOGGLE_MEM = (1U << UVERBS_ID_NS_SHIFT),
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BNXT_RE_METHOD_RELEASE_TOGGLE_MEM,
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};
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#endif /* __BNXT_RE_UVERBS_ABI_H__*/
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