mirror of
https://github.com/torvalds/linux.git
synced 2024-12-28 05:41:55 +00:00
f7df9be067
These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as well,
and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and
the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition"
is added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
are supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported, which
in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
following the IPQ806x that is used in many high-end WiFi routers. This one
integrates two ath10k wifi radios that were previously on separate chips.
Other boards that got added for existing chips are:
- On Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
- On Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
- On NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
SoloX Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
- On Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
- On Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
- On Rockchips platform:
- mqmaker MiQi single-board computer
- On Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
- On Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
single board computers
Across many platforms, bug fixes went in to address warnings that
dtc now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
803 lines
22 KiB
Plaintext
803 lines
22 KiB
Plaintext
/*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* AM43x EPOS EVM */
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/dts-v1/;
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#include "am4372.dtsi"
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#include <dt-bindings/pinctrl/am43xx.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/sound/tlv320aic31xx-micbias.h>
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/ {
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model = "TI AM43x EPOS EVM";
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compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
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aliases {
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display0 = &lcd0;
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};
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vmmcsd_fixed: fixedregulator-sd {
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compatible = "regulator-fixed";
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regulator-name = "vmmcsd_fixed";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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};
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vbat: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "vbat";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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};
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lcd0: display {
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compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
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label = "lcd";
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panel-timing {
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clock-frequency = <33000000>;
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hactive = <800>;
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vactive = <480>;
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hfront-porch = <210>;
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hback-porch = <16>;
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hsync-len = <30>;
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vback-porch = <10>;
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vfront-porch = <22>;
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vsync-len = <13>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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port {
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lcd_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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};
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matrix_keypad: matrix_keypad@0 {
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compatible = "gpio-matrix-keypad";
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debounce-delay-ms = <5>;
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col-scan-delay-us = <2>;
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row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
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&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
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&gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
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&gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
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col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
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&gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
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&gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
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&gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */
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linux,keymap = <0x00000201 /* P1 */
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0x01000204 /* P4 */
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0x02000207 /* P7 */
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0x0300020a /* NUMERIC_STAR */
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0x00010202 /* P2 */
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0x01010205 /* P5 */
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0x02010208 /* P8 */
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0x03010200 /* P0 */
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0x00020203 /* P3 */
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0x01020206 /* P6 */
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0x02020209 /* P9 */
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0x0302020b /* NUMERIC_POUND */
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0x00030067 /* UP */
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0x0103006a /* RIGHT */
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0x0203006c /* DOWN */
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0x03030069>; /* LEFT */
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};
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backlight {
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compatible = "pwm-backlight";
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pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
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brightness-levels = <0 51 53 56 62 75 101 152 255>;
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default-brightness-level = <8>;
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};
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sound0: sound0 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "AM43-EPOS-EVM";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker";
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simple-audio-card,routing =
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"MIC1LP", "Microphone Jack",
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"MIC1RP", "Microphone Jack",
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"MIC1LP", "MICBIAS",
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"MIC1RP", "MICBIAS",
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"Headphone Jack", "HPL",
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"Headphone Jack", "HPR",
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"Speaker", "SPL",
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"Speaker", "SPR";
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simple-audio-card,format = "dsp_b";
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simple-audio-card,bitclock-master = <&sound0_master>;
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simple-audio-card,frame-master = <&sound0_master>;
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simple-audio-card,bitclock-inversion;
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simple-audio-card,cpu {
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sound-dai = <&mcasp1>;
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system-clock-frequency = <12000000>;
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};
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sound0_master: simple-audio-card,codec {
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sound-dai = <&tlv320aic3111>;
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system-clock-frequency = <12000000>;
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};
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};
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};
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&am43xx_pinmux {
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
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AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
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AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
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AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
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AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
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AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
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AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
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>;
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};
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cpsw_sleep: cpsw_sleep {
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pinctrl-single,pins = <
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/* Slave 1 reset value */
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AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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davinci_mdio_sleep: davinci_mdio_sleep {
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pinctrl-single,pins = <
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/* MDIO reset value */
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AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
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AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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nand_flash_x8: nand_flash_x8 {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
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AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
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AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
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AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
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AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
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AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
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AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
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AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
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AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
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AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
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AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
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AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
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AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
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AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
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AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
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AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
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>;
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};
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ecap0_pins: backlight_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
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>;
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};
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
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AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl.i2c2_scl */
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>;
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};
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spi0_pins: pinmux_spi0_pins {
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pinctrl-single,pins = <
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AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
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AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
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AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
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|
AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
|
|
>;
|
|
};
|
|
|
|
spi1_pins: pinmux_spi1_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
|
|
AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
|
|
AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
|
|
AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
|
|
>;
|
|
};
|
|
|
|
mmc1_pins: pinmux_mmc1_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
|
>;
|
|
};
|
|
|
|
qspi1_default: qspi1_default {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
|
|
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
|
|
AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
|
|
AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
|
|
AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
|
|
AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
|
|
>;
|
|
};
|
|
|
|
pixcir_ts_pins: pixcir_ts_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
|
|
>;
|
|
};
|
|
|
|
hdq_pins: pinmux_hdq_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
|
|
>;
|
|
};
|
|
|
|
dss_pins: dss_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
|
|
AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
|
|
AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
|
|
AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
|
AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
|
|
AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
|
AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
|
AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
|
AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
|
AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
|
>;
|
|
};
|
|
|
|
display_mux_pins: display_mux_pins {
|
|
pinctrl-single,pins = <
|
|
/* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
|
|
AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
vpfe1_pins_default: vpfe1_pins_default {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
|
|
AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
|
|
AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
|
|
AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
|
|
AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
|
|
AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
|
|
AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
|
|
AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
|
|
AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
|
|
AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
|
|
AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
|
|
AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
|
|
AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
|
|
>;
|
|
};
|
|
|
|
vpfe1_pins_sleep: vpfe1_pins_sleep {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
|
>;
|
|
};
|
|
|
|
mcasp1_pins: mcasp1_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
|
|
AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
|
|
AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
|
|
AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
|
|
>;
|
|
};
|
|
|
|
mcasp1_sleep_pins: mcasp1_sleep_pins {
|
|
pinctrl-single,pins = <
|
|
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
|
|
>;
|
|
};
|
|
};
|
|
|
|
&mmc1 {
|
|
status = "okay";
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
bus-width = <4>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mmc1_pins>;
|
|
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
&mac {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&cpsw_default>;
|
|
pinctrl-1 = <&cpsw_sleep>;
|
|
status = "okay";
|
|
};
|
|
|
|
&davinci_mdio {
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&davinci_mdio_default>;
|
|
pinctrl-1 = <&davinci_mdio_sleep>;
|
|
status = "okay";
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy_id = <&davinci_mdio>, <16>;
|
|
phy-mode = "rmii";
|
|
};
|
|
|
|
&cpsw_emac1 {
|
|
phy_id = <&davinci_mdio>, <1>;
|
|
phy-mode = "rmii";
|
|
};
|
|
|
|
&phy_sel {
|
|
rmii-clock-ext;
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
clock-frequency = <400000>;
|
|
|
|
tps65218: tps65218@24 {
|
|
reg = <0x24>;
|
|
compatible = "ti,tps65218";
|
|
interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
|
|
dcdc1: regulator-dcdc1 {
|
|
compatible = "ti,tps65218-dcdc1";
|
|
regulator-name = "vdd_core";
|
|
regulator-min-microvolt = <912000>;
|
|
regulator-max-microvolt = <1144000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc2: regulator-dcdc2 {
|
|
compatible = "ti,tps65218-dcdc2";
|
|
regulator-name = "vdd_mpu";
|
|
regulator-min-microvolt = <912000>;
|
|
regulator-max-microvolt = <1378000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc3: regulator-dcdc3 {
|
|
compatible = "ti,tps65218-dcdc3";
|
|
regulator-name = "vdcdc3";
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc4: regulator-dcdc4 {
|
|
compatible = "ti,tps65218-dcdc4";
|
|
regulator-name = "vdcdc4";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
dcdc5: regulator-dcdc5 {
|
|
compatible = "ti,tps65218-dcdc5";
|
|
regulator-name = "v1_0bat";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
};
|
|
|
|
dcdc6: regulator-dcdc6 {
|
|
compatible = "ti,tps65218-dcdc6";
|
|
regulator-name = "v1_8bat";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
ldo1: regulator-ldo1 {
|
|
compatible = "ti,tps65218-ldo1";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
|
|
at24@50 {
|
|
compatible = "at24,24c256";
|
|
pagesize = <64>;
|
|
reg = <0x50>;
|
|
};
|
|
|
|
pixcir_ts@5c {
|
|
compatible = "pixcir,pixcir_tangoc";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pixcir_ts_pins>;
|
|
reg = <0x5c>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
|
|
|
touchscreen-size-x = <1024>;
|
|
touchscreen-size-y = <600>;
|
|
};
|
|
|
|
tlv320aic3111: tlv320aic3111@18 {
|
|
#sound-dai-cells = <0>;
|
|
compatible = "ti,tlv320aic3111";
|
|
reg = <0x18>;
|
|
status = "okay";
|
|
|
|
ai31xx-micbias-vg = <MICBIAS_2_0V>;
|
|
|
|
/* Regulators */
|
|
HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
|
|
SPRVDD-supply = <&vbat>; /* vbat */
|
|
SPLVDD-supply = <&vbat>; /* vbat */
|
|
AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
|
|
IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
|
|
DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c2_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&display_mux_pins>;
|
|
status = "okay";
|
|
|
|
p1 {
|
|
/*
|
|
* SelLCDorHDMI selects between display and audio paths:
|
|
* Low: HDMI display with audio via HDMI
|
|
* High: LCD display with analog audio via aic3111 codec
|
|
*/
|
|
gpio-hog;
|
|
gpios = <1 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "SelLCDorHDMI";
|
|
};
|
|
};
|
|
|
|
&gpio3 {
|
|
status = "okay";
|
|
};
|
|
|
|
&elm {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpmc {
|
|
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&nand_flash_x8>;
|
|
ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
|
|
nand@0,0 {
|
|
compatible = "ti,omap2-nand";
|
|
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
|
interrupt-parent = <&gpmc>;
|
|
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
|
<1 IRQ_TYPE_NONE>; /* termcount */
|
|
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
|
ti,nand-ecc-opt = "bch16";
|
|
ti,elm-id = <&elm>;
|
|
nand-bus-width = <8>;
|
|
gpmc,device-width = <1>;
|
|
gpmc,sync-clk-ps = <0>;
|
|
gpmc,cs-on-ns = <0>;
|
|
gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
|
|
gpmc,cs-wr-off-ns = <40>;
|
|
gpmc,adv-on-ns = <0>; /* cs-on-ns */
|
|
gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
|
|
gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
|
|
gpmc,we-on-ns = <0>; /* cs-on-ns */
|
|
gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
|
|
gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
|
|
gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
|
|
gpmc,access-ns = <30>; /* tCEA + 4*/
|
|
gpmc,rd-cycle-ns = <40>;
|
|
gpmc,wr-cycle-ns = <40>;
|
|
gpmc,bus-turnaround-ns = <0>;
|
|
gpmc,cycle2cycle-delay-ns = <0>;
|
|
gpmc,clk-activation-ns = <0>;
|
|
gpmc,wr-access-ns = <40>;
|
|
gpmc,wr-data-mux-bus-ns = <0>;
|
|
/* MTD partition table */
|
|
/* All SPL-* partitions are sized to minimal length
|
|
* which can be independently programmable. For
|
|
* NAND flash this is equal to size of erase-block */
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
partition@0 {
|
|
label = "NAND.SPL";
|
|
reg = <0x00000000 0x00040000>;
|
|
};
|
|
partition@1 {
|
|
label = "NAND.SPL.backup1";
|
|
reg = <0x00040000 0x00040000>;
|
|
};
|
|
partition@2 {
|
|
label = "NAND.SPL.backup2";
|
|
reg = <0x00080000 0x00040000>;
|
|
};
|
|
partition@3 {
|
|
label = "NAND.SPL.backup3";
|
|
reg = <0x000C0000 0x00040000>;
|
|
};
|
|
partition@4 {
|
|
label = "NAND.u-boot-spl-os";
|
|
reg = <0x00100000 0x00080000>;
|
|
};
|
|
partition@5 {
|
|
label = "NAND.u-boot";
|
|
reg = <0x00180000 0x00100000>;
|
|
};
|
|
partition@6 {
|
|
label = "NAND.u-boot-env";
|
|
reg = <0x00280000 0x00040000>;
|
|
};
|
|
partition@7 {
|
|
label = "NAND.u-boot-env.backup1";
|
|
reg = <0x002C0000 0x00040000>;
|
|
};
|
|
partition@8 {
|
|
label = "NAND.kernel";
|
|
reg = <0x00300000 0x00700000>;
|
|
};
|
|
partition@9 {
|
|
label = "NAND.file-system";
|
|
reg = <0x00a00000 0x1f600000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&epwmss0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&tscadc {
|
|
status = "okay";
|
|
|
|
adc {
|
|
ti,adc-channels = <0 1 2 3 4 5 6 7>;
|
|
};
|
|
};
|
|
|
|
&ecap0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&ecap0_pins>;
|
|
};
|
|
|
|
&spi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&spi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb1 {
|
|
dr_mode = "peripheral";
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2_phy2 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb2 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&qspi {
|
|
status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&qspi1_default>;
|
|
|
|
spi-max-frequency = <48000000>;
|
|
m25p80@0 {
|
|
compatible = "mx66l51235l";
|
|
spi-max-frequency = <48000000>;
|
|
reg = <0>;
|
|
spi-cpol;
|
|
spi-cpha;
|
|
spi-tx-bus-width = <1>;
|
|
spi-rx-bus-width = <4>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
/* MTD partition table.
|
|
* The ROM checks the first 512KiB
|
|
* for a valid file to boot(XIP).
|
|
*/
|
|
partition@0 {
|
|
label = "QSPI.U_BOOT";
|
|
reg = <0x00000000 0x000080000>;
|
|
};
|
|
partition@1 {
|
|
label = "QSPI.U_BOOT.backup";
|
|
reg = <0x00080000 0x00080000>;
|
|
};
|
|
partition@2 {
|
|
label = "QSPI.U-BOOT-SPL_OS";
|
|
reg = <0x00100000 0x00010000>;
|
|
};
|
|
partition@3 {
|
|
label = "QSPI.U_BOOT_ENV";
|
|
reg = <0x00110000 0x00010000>;
|
|
};
|
|
partition@4 {
|
|
label = "QSPI.U-BOOT-ENV.backup";
|
|
reg = <0x00120000 0x00010000>;
|
|
};
|
|
partition@5 {
|
|
label = "QSPI.KERNEL";
|
|
reg = <0x00130000 0x0800000>;
|
|
};
|
|
partition@6 {
|
|
label = "QSPI.FILESYSTEM";
|
|
reg = <0x00930000 0x36D0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&hdq {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&hdq_pins>;
|
|
};
|
|
|
|
&dss {
|
|
status = "ok";
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&dss_pins>;
|
|
|
|
port {
|
|
dpi_out: endpoint@0 {
|
|
remote-endpoint = <&lcd_in>;
|
|
data-lines = <24>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&vpfe1 {
|
|
status = "okay";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&vpfe1_pins_default>;
|
|
pinctrl-1 = <&vpfe1_pins_sleep>;
|
|
|
|
port {
|
|
vpfe1_ep: endpoint {
|
|
/* remote-endpoint = <&sensor>; add once we have it */
|
|
ti,am437x-vpfe-interface = <0>;
|
|
bus-width = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mcasp1 {
|
|
#sound-dai-cells = <0>;
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <&mcasp1_pins>;
|
|
pinctrl-1 = <&mcasp1_sleep_pins>;
|
|
|
|
status = "okay";
|
|
|
|
op-mode = <0>; /* MCASP_IIS_MODE */
|
|
tdm-slots = <2>;
|
|
/* 4 serializer */
|
|
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
|
|
1 2 0 0
|
|
>;
|
|
tx-num-evt = <32>;
|
|
rx-num-evt = <32>;
|
|
};
|
|
|
|
&synctimer_32kclk {
|
|
assigned-clocks = <&mux_synctimer32k_ck>;
|
|
assigned-clock-parents = <&clkdiv32k_ick>;
|
|
};
|