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3f0ea7645a
Add offset & mask fields to struct powerdomain In case of AM33xx family of devices, there is no consistency between PWRSTCTRL & PWRSTST register offsers in PRM space, for example - PRM_XXX PWRSTCTRL PWRSTST ======================================= PRM_PER_MOD: 0x0C, 0x08 PRM_WKUP_MOD: 0x04, 0x08 PRM_MPU_MOD: 0x00, 0x04 PRM_DEVICE_MOD: NA, NA And also, there is no consistency between bit-offsets inside PWRSTCTRL & PWRSTST register, for example - PRM_XXX LOGICRET MEMON MEMRET ======================================= GFX_PWRCTRL: 2, 17, 6 PER_PWRCTRL: 3, 25, 29 MPU_PWRCTRL: 2, 18, 22 WKUP_PWRCTRL: 3, NA, NA This means, we need to maintain and pass on all this information in powerdomain handle; so adding fields for, - PWRSTCTRL/ST register offset - Logic retention state mask - mem_on/ret/pwrst/retst mask Currently, this fields is only applicable and used for AM33XX devices. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: this patch is a combination of "Add offset & mask fields to struct powerdomain" and the powerdomain portions of "ARM: OMAP3+: am33xx: Add powerdomain & PRM support"; updated for 3.5] Signed-off-by: Paul Walmsley <paul@pwsan.com>
230 lines
5.4 KiB
C
230 lines
5.4 KiB
C
/*
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* AM33XX Powerdomain control
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Derived from mach-omap2/powerdomain44xx.c written by Rajendra Nayak
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* <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/io.h>
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#include <linux/errno.h>
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#include <linux/delay.h>
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#include <plat/prcm.h>
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#include "powerdomain.h"
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#include "prm33xx.h"
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#include "prm-regbits-33xx.h"
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static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
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{
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am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
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(pwrst << OMAP_POWERSTATE_SHIFT),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= OMAP_POWERSTATE_MASK;
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v >>= OMAP_POWERSTATE_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= OMAP_POWERSTATEST_MASK;
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v >>= OMAP_POWERSTATEST_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
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v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
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{
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am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
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(1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
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{
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am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
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AM33XX_LASTPOWERSTATEENTERED_MASK,
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pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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return 0;
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}
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static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
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{
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u32 m;
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m = pwrdm->logicretstate_mask;
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
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{
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u32 v;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= AM33XX_LOGICSTATEST_MASK;
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v >>= AM33XX_LOGICSTATEST_SHIFT;
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return v;
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}
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static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
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{
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u32 v, m;
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m = pwrdm->logicretstate_mask;
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = pwrdm->mem_on_mask[bank];
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
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u8 pwrst)
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{
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u32 m;
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m = pwrdm->mem_ret_mask[bank];
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if (!m)
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return -EINVAL;
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am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
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pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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return 0;
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}
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static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = pwrdm->mem_pwrst_mask[bank];
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
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{
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u32 m, v;
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m = pwrdm->mem_retst_mask[bank];
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if (!m)
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return -EINVAL;
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v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
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v &= m;
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v >>= __ffs(m);
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return v;
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}
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static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
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{
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u32 c = 0;
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/*
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* REVISIT: pwrdm_wait_transition() may be better implemented
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* via a callback and a periodic timer check -- how long do we expect
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* powerdomain transitions to take?
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*/
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/* XXX Is this udelay() value meaningful? */
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while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
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& OMAP_INTRANSITION_MASK) &&
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(c++ < PWRDM_TRANSITION_BAILOUT))
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udelay(1);
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if (c > PWRDM_TRANSITION_BAILOUT) {
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pr_err("powerdomain: %s: waited too long to complete transition\n",
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pwrdm->name);
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return -EAGAIN;
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}
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pr_debug("powerdomain: completed transition in %d loops\n", c);
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return 0;
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}
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struct pwrdm_ops am33xx_pwrdm_operations = {
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.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
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.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
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.pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst,
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.pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst,
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.pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst,
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.pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst,
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.pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst,
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.pwrdm_clear_all_prev_pwrst = am33xx_pwrdm_clear_all_prev_pwrst,
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.pwrdm_set_lowpwrstchange = am33xx_pwrdm_set_lowpwrstchange,
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.pwrdm_read_mem_pwrst = am33xx_pwrdm_read_mem_pwrst,
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.pwrdm_read_mem_retst = am33xx_pwrdm_read_mem_retst,
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.pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst,
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.pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst,
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.pwrdm_wait_transition = am33xx_pwrdm_wait_transition,
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};
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