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13e72c3e22
Implement the support for SAW v4.1, used in at least MSM8998, SDM630, SDM660 and APQ variants and, while at it, also add the configuration for the SDM630/660 Silver and Gold cluster L2 Adaptive Voltage Scaler: this is also one of the prerequisites to allow the OSM controller to perform DCVS. Please note that despite there are various "versions" of these values downstream, these are the only ones that are perfectly stable on the entire set of tested devices. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210729155609.608159-4-angelogioacchino.delregno@somainline.org
44 lines
821 B
C
44 lines
821 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014,2015, Linaro Ltd.
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*/
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#ifndef __SPM_H__
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#define __SPM_H__
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#include <linux/cpuidle.h>
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#define MAX_PMIC_DATA 2
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#define MAX_SEQ_DATA 64
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enum pm_sleep_mode {
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PM_SLEEP_MODE_STBY,
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PM_SLEEP_MODE_RET,
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PM_SLEEP_MODE_SPC,
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PM_SLEEP_MODE_PC,
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PM_SLEEP_MODE_NR,
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};
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struct spm_reg_data {
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const u16 *reg_offset;
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u32 spm_cfg;
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u32 spm_dly;
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u32 pmic_dly;
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u32 pmic_data[MAX_PMIC_DATA];
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u32 avs_ctl;
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u32 avs_limit;
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u8 seq[MAX_SEQ_DATA];
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u8 start_index[PM_SLEEP_MODE_NR];
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};
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struct spm_driver_data {
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void __iomem *reg_base;
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const struct spm_reg_data *reg_data;
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};
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void spm_set_low_power_mode(struct spm_driver_data *drv,
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enum pm_sleep_mode mode);
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#endif /* __SPM_H__ */
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