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Previously there was a problem where a late handshake handling caused a memory corruption, this problem was resolved by issuing calibration command right after changing the timing, but looks like the solution wasn't entirely correct since calibration interval could be disabled as well. Now programming sequence is completed immediately after receiving handshake from CaR, without potentially long delays and in accordance to the TRM's programming guide. Secondly, the TRM's programming guide suggests to flush EMC writes by reading any *MC* register before doing CaR changes. This is also addressed now. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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.. | ||
Kconfig | ||
Makefile | ||
mc.c | ||
mc.h | ||
tegra20-emc.c | ||
tegra20.c | ||
tegra30-emc.c | ||
tegra30.c | ||
tegra114.c | ||
tegra124-emc.c | ||
tegra124.c | ||
tegra186-emc.c | ||
tegra186.c | ||
tegra210.c |