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f16d80b75a
On systems like P9 powernv where we have no TM (or P8 booted with ppc_tm=off), userspace can construct a signal context which still has the MSR TS bits set. The kernel tries to restore this context which results in the following crash: Unexpected TM Bad Thing exception at c0000000000022fc (msr 0x8000000102a03031) tm_scratch=800000020280f033 Oops: Unrecoverable exception, sig: 6 [#1] LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries Modules linked in: CPU: 0 PID: 1636 Comm: sigfuz Not tainted 5.2.0-11043-g0a8ad0ffa4 #69 NIP: c0000000000022fc LR: 00007fffb2d67e48 CTR: 0000000000000000 REGS: c00000003fffbd70 TRAP: 0700 Not tainted (5.2.0-11045-g7142b497d8) MSR: 8000000102a03031 <SF,VEC,VSX,FP,ME,IR,DR,LE,TM[E]> CR: 42004242 XER: 00000000 CFAR: c0000000000022e0 IRQMASK: 0 GPR00: 0000000000000072 00007fffb2b6e560 00007fffb2d87f00 0000000000000669 GPR04: 00007fffb2b6e728 0000000000000000 0000000000000000 00007fffb2b6f2a8 GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR12: 0000000000000000 00007fffb2b76900 0000000000000000 0000000000000000 GPR16: 00007fffb2370000 00007fffb2d84390 00007fffea3a15ac 000001000a250420 GPR20: 00007fffb2b6f260 0000000010001770 0000000000000000 0000000000000000 GPR24: 00007fffb2d843a0 00007fffea3a14a0 0000000000010000 0000000000800000 GPR28: 00007fffea3a14d8 00000000003d0f00 0000000000000000 00007fffb2b6e728 NIP [c0000000000022fc] rfi_flush_fallback+0x7c/0x80 LR [00007fffb2d67e48] 0x7fffb2d67e48 Call Trace: Instruction dump: e96a0220 e96a02a8 e96a0330 e96a03b8 394a0400 4200ffdc7d2903a6
e92d0c00 e94d0c08 e96d0c10 e82d0c18 7db242a6 <4c000024> 7db243a6 7db142a6 f82d0c18 The problem is the signal code assumes TM is enabled when CONFIG_PPC_TRANSACTIONAL_MEM is enabled. This may not be the case as with P9 powernv or if `ppc_tm=off` is used on P8. This means any local user can crash the system. Fix the problem by returning a bad stack frame to the user if they try to set the MSR TS bits with sigreturn() on systems where TM is not supported. Found with sigfuz kernel selftest on P9. This fixes CVE-2019-13648. Fixes:2b0a576d15
("powerpc: Add new transactional memory state to the signal context") Cc: stable@vger.kernel.org # v3.9 Reported-by: Praveen Pandey <Praveen.Pandey@in.ibm.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190719050502.405-1-mikey@neuling.org
1521 lines
42 KiB
C
1521 lines
42 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
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*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Copyright (C) 2001 IBM
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* Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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*
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* Derived from "arch/i386/kernel/signal.c"
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* Copyright (C) 1991, 1992 Linus Torvalds
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* 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
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*/
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/errno.h>
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#include <linux/elf.h>
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#include <linux/ptrace.h>
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#include <linux/pagemap.h>
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#include <linux/ratelimit.h>
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#include <linux/syscalls.h>
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#ifdef CONFIG_PPC64
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#include <linux/compat.h>
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#else
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#include <linux/wait.h>
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#include <linux/unistd.h>
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#include <linux/stddef.h>
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#include <linux/tty.h>
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#include <linux/binfmts.h>
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#endif
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#include <asm/syscalls.h>
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#include <asm/sigcontext.h>
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#include <asm/vdso.h>
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#include <asm/switch_to.h>
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#include <asm/tm.h>
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#include <asm/asm-prototypes.h>
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#ifdef CONFIG_PPC64
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#include "ppc32.h"
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#include <asm/unistd.h>
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#else
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#include <asm/ucontext.h>
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#include <asm/pgtable.h>
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#endif
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#include "signal.h"
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#ifdef CONFIG_PPC64
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#define old_sigaction old_sigaction32
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#define sigcontext sigcontext32
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#define mcontext mcontext32
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#define ucontext ucontext32
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#define __save_altstack __compat_save_altstack
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/*
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* Userspace code may pass a ucontext which doesn't include VSX added
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* at the end. We need to check for this case.
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*/
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#define UCONTEXTSIZEWITHOUTVSX \
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(sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
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/*
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* Returning 0 means we return to userspace via
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* ret_from_except and thus restore all user
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* registers from *regs. This is what we need
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* to do when a signal has been delivered.
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*/
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#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
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#undef __SIGNAL_FRAMESIZE
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#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
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#undef ELF_NVRREG
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#define ELF_NVRREG ELF_NVRREG32
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/*
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* Functions for flipping sigsets (thanks to brain dead generic
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* implementation that makes things simple for little endian only)
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*/
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static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
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{
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return put_compat_sigset(uset, set, sizeof(*uset));
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}
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static inline int get_sigset_t(sigset_t *set,
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const compat_sigset_t __user *uset)
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{
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return get_compat_sigset(set, uset);
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}
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#define to_user_ptr(p) ptr_to_compat(p)
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#define from_user_ptr(p) compat_ptr(p)
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static inline int save_general_regs(struct pt_regs *regs,
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struct mcontext __user *frame)
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{
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elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
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int i;
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/* Force usr to alway see softe as 1 (interrupts enabled) */
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elf_greg_t64 softe = 0x1;
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WARN_ON(!FULL_REGS(regs));
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for (i = 0; i <= PT_RESULT; i ++) {
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if (i == 14 && !FULL_REGS(regs))
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i = 32;
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if ( i == PT_SOFTE) {
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if(__put_user((unsigned int)softe, &frame->mc_gregs[i]))
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return -EFAULT;
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else
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continue;
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}
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if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
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return -EFAULT;
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}
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return 0;
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}
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static inline int restore_general_regs(struct pt_regs *regs,
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struct mcontext __user *sr)
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{
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elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
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int i;
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for (i = 0; i <= PT_RESULT; i++) {
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if ((i == PT_MSR) || (i == PT_SOFTE))
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continue;
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if (__get_user(gregs[i], &sr->mc_gregs[i]))
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return -EFAULT;
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}
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return 0;
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}
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#else /* CONFIG_PPC64 */
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#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
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static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
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{
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return copy_to_user(uset, set, sizeof(*uset));
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}
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static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
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{
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return copy_from_user(set, uset, sizeof(*uset));
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}
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#define to_user_ptr(p) ((unsigned long)(p))
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#define from_user_ptr(p) ((void __user *)(p))
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static inline int save_general_regs(struct pt_regs *regs,
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struct mcontext __user *frame)
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{
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WARN_ON(!FULL_REGS(regs));
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return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
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}
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static inline int restore_general_regs(struct pt_regs *regs,
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struct mcontext __user *sr)
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{
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/* copy up to but not including MSR */
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if (__copy_from_user(regs, &sr->mc_gregs,
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PT_MSR * sizeof(elf_greg_t)))
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return -EFAULT;
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/* copy from orig_r3 (the word after the MSR) up to the end */
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if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
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GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
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return -EFAULT;
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return 0;
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}
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#endif
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/*
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* When we have signals to deliver, we set up on the
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* user stack, going down from the original stack pointer:
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* an ABI gap of 56 words
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* an mcontext struct
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* a sigcontext struct
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* a gap of __SIGNAL_FRAMESIZE bytes
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*
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* Each of these things must be a multiple of 16 bytes in size. The following
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* structure represent all of this except the __SIGNAL_FRAMESIZE gap
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*
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*/
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struct sigframe {
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struct sigcontext sctx; /* the sigcontext */
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struct mcontext mctx; /* all the register values */
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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struct sigcontext sctx_transact;
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struct mcontext mctx_transact;
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#endif
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/*
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* Programs using the rs6000/xcoff abi can save up to 19 gp
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* regs and 18 fp regs below sp before decrementing it.
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*/
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int abigap[56];
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};
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/* We use the mc_pad field for the signal return trampoline. */
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#define tramp mc_pad
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/*
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* When we have rt signals to deliver, we set up on the
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* user stack, going down from the original stack pointer:
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* one rt_sigframe struct (siginfo + ucontext + ABI gap)
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* a gap of __SIGNAL_FRAMESIZE+16 bytes
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* (the +16 is to get the siginfo and ucontext in the same
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* positions as in older kernels).
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*
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* Each of these things must be a multiple of 16 bytes in size.
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*
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*/
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struct rt_sigframe {
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#ifdef CONFIG_PPC64
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compat_siginfo_t info;
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#else
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struct siginfo info;
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#endif
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struct ucontext uc;
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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struct ucontext uc_transact;
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#endif
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/*
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* Programs using the rs6000/xcoff abi can save up to 19 gp
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* regs and 18 fp regs below sp before decrementing it.
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*/
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int abigap[56];
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};
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#ifdef CONFIG_VSX
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unsigned long copy_fpr_to_user(void __user *to,
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struct task_struct *task)
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{
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u64 buf[ELF_NFPREG];
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int i;
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/* save FPR copy to local buffer then write to the thread_struct */
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for (i = 0; i < (ELF_NFPREG - 1) ; i++)
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buf[i] = task->thread.TS_FPR(i);
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buf[i] = task->thread.fp_state.fpscr;
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return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
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}
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unsigned long copy_fpr_from_user(struct task_struct *task,
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void __user *from)
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{
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u64 buf[ELF_NFPREG];
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int i;
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if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
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return 1;
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for (i = 0; i < (ELF_NFPREG - 1) ; i++)
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task->thread.TS_FPR(i) = buf[i];
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task->thread.fp_state.fpscr = buf[i];
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return 0;
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}
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unsigned long copy_vsx_to_user(void __user *to,
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struct task_struct *task)
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{
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u64 buf[ELF_NVSRHALFREG];
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int i;
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/* save FPR copy to local buffer then write to the thread_struct */
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for (i = 0; i < ELF_NVSRHALFREG; i++)
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buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
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return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
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}
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unsigned long copy_vsx_from_user(struct task_struct *task,
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void __user *from)
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{
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u64 buf[ELF_NVSRHALFREG];
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int i;
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if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
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return 1;
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for (i = 0; i < ELF_NVSRHALFREG ; i++)
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task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
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return 0;
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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unsigned long copy_ckfpr_to_user(void __user *to,
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struct task_struct *task)
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{
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u64 buf[ELF_NFPREG];
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int i;
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/* save FPR copy to local buffer then write to the thread_struct */
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for (i = 0; i < (ELF_NFPREG - 1) ; i++)
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buf[i] = task->thread.TS_CKFPR(i);
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buf[i] = task->thread.ckfp_state.fpscr;
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return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
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}
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unsigned long copy_ckfpr_from_user(struct task_struct *task,
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void __user *from)
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{
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u64 buf[ELF_NFPREG];
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int i;
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if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
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return 1;
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for (i = 0; i < (ELF_NFPREG - 1) ; i++)
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task->thread.TS_CKFPR(i) = buf[i];
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task->thread.ckfp_state.fpscr = buf[i];
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return 0;
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}
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unsigned long copy_ckvsx_to_user(void __user *to,
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struct task_struct *task)
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{
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u64 buf[ELF_NVSRHALFREG];
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int i;
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/* save FPR copy to local buffer then write to the thread_struct */
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for (i = 0; i < ELF_NVSRHALFREG; i++)
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buf[i] = task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
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return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
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}
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unsigned long copy_ckvsx_from_user(struct task_struct *task,
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void __user *from)
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{
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u64 buf[ELF_NVSRHALFREG];
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int i;
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if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
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return 1;
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for (i = 0; i < ELF_NVSRHALFREG ; i++)
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task->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
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return 0;
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}
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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#else
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inline unsigned long copy_fpr_to_user(void __user *to,
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struct task_struct *task)
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{
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return __copy_to_user(to, task->thread.fp_state.fpr,
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ELF_NFPREG * sizeof(double));
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}
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inline unsigned long copy_fpr_from_user(struct task_struct *task,
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void __user *from)
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{
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return __copy_from_user(task->thread.fp_state.fpr, from,
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ELF_NFPREG * sizeof(double));
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}
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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inline unsigned long copy_ckfpr_to_user(void __user *to,
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struct task_struct *task)
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{
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return __copy_to_user(to, task->thread.ckfp_state.fpr,
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ELF_NFPREG * sizeof(double));
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}
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inline unsigned long copy_ckfpr_from_user(struct task_struct *task,
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void __user *from)
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{
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return __copy_from_user(task->thread.ckfp_state.fpr, from,
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ELF_NFPREG * sizeof(double));
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}
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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#endif
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/*
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* Save the current user registers on the user stack.
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* We only save the altivec/spe registers if the process has used
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* altivec/spe instructions at some point.
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*/
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static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
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struct mcontext __user *tm_frame, int sigret,
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int ctx_has_vsx_region)
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{
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unsigned long msr = regs->msr;
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/* Make sure floating point registers are stored in regs */
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flush_fp_to_thread(current);
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/* save general registers */
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if (save_general_regs(regs, frame))
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return 1;
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#ifdef CONFIG_ALTIVEC
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/* save altivec registers */
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if (current->thread.used_vr) {
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flush_altivec_to_thread(current);
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if (__copy_to_user(&frame->mc_vregs, ¤t->thread.vr_state,
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ELF_NVRREG * sizeof(vector128)))
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return 1;
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/* set MSR_VEC in the saved MSR value to indicate that
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frame->mc_vregs contains valid data */
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msr |= MSR_VEC;
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}
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/* else assert((regs->msr & MSR_VEC) == 0) */
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/* We always copy to/from vrsave, it's 0 if we don't have or don't
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* use altivec. Since VSCR only contains 32 bits saved in the least
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* significant bits of a vector, we "cheat" and stuff VRSAVE in the
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* most significant bits of that same vector. --BenH
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* Note that the current VRSAVE value is in the SPR at this point.
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*/
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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current->thread.vrsave = mfspr(SPRN_VRSAVE);
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if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
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return 1;
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#endif /* CONFIG_ALTIVEC */
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if (copy_fpr_to_user(&frame->mc_fregs, current))
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return 1;
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/*
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* Clear the MSR VSX bit to indicate there is no valid state attached
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* to this context, except in the specific case below where we set it.
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*/
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msr &= ~MSR_VSX;
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#ifdef CONFIG_VSX
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/*
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* Copy VSR 0-31 upper half from thread_struct to local
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* buffer, then write that to userspace. Also set MSR_VSX in
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* the saved MSR value to indicate that frame->mc_vregs
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|
* contains valid data
|
|
*/
|
|
if (current->thread.used_vsr && ctx_has_vsx_region) {
|
|
flush_vsx_to_thread(current);
|
|
if (copy_vsx_to_user(&frame->mc_vsregs, current))
|
|
return 1;
|
|
msr |= MSR_VSX;
|
|
}
|
|
#endif /* CONFIG_VSX */
|
|
#ifdef CONFIG_SPE
|
|
/* save spe registers */
|
|
if (current->thread.used_spe) {
|
|
flush_spe_to_thread(current);
|
|
if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
|
|
ELF_NEVRREG * sizeof(u32)))
|
|
return 1;
|
|
/* set MSR_SPE in the saved MSR value to indicate that
|
|
frame->mc_vregs contains valid data */
|
|
msr |= MSR_SPE;
|
|
}
|
|
/* else assert((regs->msr & MSR_SPE) == 0) */
|
|
|
|
/* We always copy to/from spefscr */
|
|
if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
|
|
return 1;
|
|
#endif /* CONFIG_SPE */
|
|
|
|
if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
|
|
return 1;
|
|
/* We need to write 0 the MSR top 32 bits in the tm frame so that we
|
|
* can check it on the restore to see if TM is active
|
|
*/
|
|
if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
|
|
return 1;
|
|
|
|
if (sigret) {
|
|
/* Set up the sigreturn trampoline: li 0,sigret; sc */
|
|
if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
|
|
|| __put_user(PPC_INST_SC, &frame->tramp[1]))
|
|
return 1;
|
|
flush_icache_range((unsigned long) &frame->tramp[0],
|
|
(unsigned long) &frame->tramp[2]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
/*
|
|
* Save the current user registers on the user stack.
|
|
* We only save the altivec/spe registers if the process has used
|
|
* altivec/spe instructions at some point.
|
|
* We also save the transactional registers to a second ucontext in the
|
|
* frame.
|
|
*
|
|
* See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
|
|
*/
|
|
static int save_tm_user_regs(struct pt_regs *regs,
|
|
struct mcontext __user *frame,
|
|
struct mcontext __user *tm_frame, int sigret)
|
|
{
|
|
unsigned long msr = regs->msr;
|
|
|
|
WARN_ON(tm_suspend_disabled);
|
|
|
|
/* Remove TM bits from thread's MSR. The MSR in the sigcontext
|
|
* just indicates to userland that we were doing a transaction, but we
|
|
* don't want to return in transactional state. This also ensures
|
|
* that flush_fp_to_thread won't set TIF_RESTORE_TM again.
|
|
*/
|
|
regs->msr &= ~MSR_TS_MASK;
|
|
|
|
/* Save both sets of general registers */
|
|
if (save_general_regs(¤t->thread.ckpt_regs, frame)
|
|
|| save_general_regs(regs, tm_frame))
|
|
return 1;
|
|
|
|
/* Stash the top half of the 64bit MSR into the 32bit MSR word
|
|
* of the transactional mcontext. This way we have a backward-compatible
|
|
* MSR in the 'normal' (checkpointed) mcontext and additionally one can
|
|
* also look at what type of transaction (T or S) was active at the
|
|
* time of the signal.
|
|
*/
|
|
if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
|
|
return 1;
|
|
|
|
#ifdef CONFIG_ALTIVEC
|
|
/* save altivec registers */
|
|
if (current->thread.used_vr) {
|
|
if (__copy_to_user(&frame->mc_vregs, ¤t->thread.ckvr_state,
|
|
ELF_NVRREG * sizeof(vector128)))
|
|
return 1;
|
|
if (msr & MSR_VEC) {
|
|
if (__copy_to_user(&tm_frame->mc_vregs,
|
|
¤t->thread.vr_state,
|
|
ELF_NVRREG * sizeof(vector128)))
|
|
return 1;
|
|
} else {
|
|
if (__copy_to_user(&tm_frame->mc_vregs,
|
|
¤t->thread.ckvr_state,
|
|
ELF_NVRREG * sizeof(vector128)))
|
|
return 1;
|
|
}
|
|
|
|
/* set MSR_VEC in the saved MSR value to indicate that
|
|
* frame->mc_vregs contains valid data
|
|
*/
|
|
msr |= MSR_VEC;
|
|
}
|
|
|
|
/* We always copy to/from vrsave, it's 0 if we don't have or don't
|
|
* use altivec. Since VSCR only contains 32 bits saved in the least
|
|
* significant bits of a vector, we "cheat" and stuff VRSAVE in the
|
|
* most significant bits of that same vector. --BenH
|
|
*/
|
|
if (cpu_has_feature(CPU_FTR_ALTIVEC))
|
|
current->thread.ckvrsave = mfspr(SPRN_VRSAVE);
|
|
if (__put_user(current->thread.ckvrsave,
|
|
(u32 __user *)&frame->mc_vregs[32]))
|
|
return 1;
|
|
if (msr & MSR_VEC) {
|
|
if (__put_user(current->thread.vrsave,
|
|
(u32 __user *)&tm_frame->mc_vregs[32]))
|
|
return 1;
|
|
} else {
|
|
if (__put_user(current->thread.ckvrsave,
|
|
(u32 __user *)&tm_frame->mc_vregs[32]))
|
|
return 1;
|
|
}
|
|
#endif /* CONFIG_ALTIVEC */
|
|
|
|
if (copy_ckfpr_to_user(&frame->mc_fregs, current))
|
|
return 1;
|
|
if (msr & MSR_FP) {
|
|
if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
|
|
return 1;
|
|
} else {
|
|
if (copy_ckfpr_to_user(&tm_frame->mc_fregs, current))
|
|
return 1;
|
|
}
|
|
|
|
#ifdef CONFIG_VSX
|
|
/*
|
|
* Copy VSR 0-31 upper half from thread_struct to local
|
|
* buffer, then write that to userspace. Also set MSR_VSX in
|
|
* the saved MSR value to indicate that frame->mc_vregs
|
|
* contains valid data
|
|
*/
|
|
if (current->thread.used_vsr) {
|
|
if (copy_ckvsx_to_user(&frame->mc_vsregs, current))
|
|
return 1;
|
|
if (msr & MSR_VSX) {
|
|
if (copy_vsx_to_user(&tm_frame->mc_vsregs,
|
|
current))
|
|
return 1;
|
|
} else {
|
|
if (copy_ckvsx_to_user(&tm_frame->mc_vsregs, current))
|
|
return 1;
|
|
}
|
|
|
|
msr |= MSR_VSX;
|
|
}
|
|
#endif /* CONFIG_VSX */
|
|
#ifdef CONFIG_SPE
|
|
/* SPE regs are not checkpointed with TM, so this section is
|
|
* simply the same as in save_user_regs().
|
|
*/
|
|
if (current->thread.used_spe) {
|
|
flush_spe_to_thread(current);
|
|
if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
|
|
ELF_NEVRREG * sizeof(u32)))
|
|
return 1;
|
|
/* set MSR_SPE in the saved MSR value to indicate that
|
|
* frame->mc_vregs contains valid data */
|
|
msr |= MSR_SPE;
|
|
}
|
|
|
|
/* We always copy to/from spefscr */
|
|
if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
|
|
return 1;
|
|
#endif /* CONFIG_SPE */
|
|
|
|
if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
|
|
return 1;
|
|
if (sigret) {
|
|
/* Set up the sigreturn trampoline: li 0,sigret; sc */
|
|
if (__put_user(PPC_INST_ADDI + sigret, &frame->tramp[0])
|
|
|| __put_user(PPC_INST_SC, &frame->tramp[1]))
|
|
return 1;
|
|
flush_icache_range((unsigned long) &frame->tramp[0],
|
|
(unsigned long) &frame->tramp[2]);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Restore the current user register values from the user stack,
|
|
* (except for MSR).
|
|
*/
|
|
static long restore_user_regs(struct pt_regs *regs,
|
|
struct mcontext __user *sr, int sig)
|
|
{
|
|
long err;
|
|
unsigned int save_r2 = 0;
|
|
unsigned long msr;
|
|
#ifdef CONFIG_VSX
|
|
int i;
|
|
#endif
|
|
|
|
/*
|
|
* restore general registers but not including MSR or SOFTE. Also
|
|
* take care of keeping r2 (TLS) intact if not a signal
|
|
*/
|
|
if (!sig)
|
|
save_r2 = (unsigned int)regs->gpr[2];
|
|
err = restore_general_regs(regs, sr);
|
|
regs->trap = 0;
|
|
err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
|
|
if (!sig)
|
|
regs->gpr[2] = (unsigned long) save_r2;
|
|
if (err)
|
|
return 1;
|
|
|
|
/* if doing signal return, restore the previous little-endian mode */
|
|
if (sig)
|
|
regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
|
|
|
|
#ifdef CONFIG_ALTIVEC
|
|
/*
|
|
* Force the process to reload the altivec registers from
|
|
* current->thread when it next does altivec instructions
|
|
*/
|
|
regs->msr &= ~MSR_VEC;
|
|
if (msr & MSR_VEC) {
|
|
/* restore altivec registers from the stack */
|
|
if (__copy_from_user(¤t->thread.vr_state, &sr->mc_vregs,
|
|
sizeof(sr->mc_vregs)))
|
|
return 1;
|
|
current->thread.used_vr = true;
|
|
} else if (current->thread.used_vr)
|
|
memset(¤t->thread.vr_state, 0,
|
|
ELF_NVRREG * sizeof(vector128));
|
|
|
|
/* Always get VRSAVE back */
|
|
if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
|
|
return 1;
|
|
if (cpu_has_feature(CPU_FTR_ALTIVEC))
|
|
mtspr(SPRN_VRSAVE, current->thread.vrsave);
|
|
#endif /* CONFIG_ALTIVEC */
|
|
if (copy_fpr_from_user(current, &sr->mc_fregs))
|
|
return 1;
|
|
|
|
#ifdef CONFIG_VSX
|
|
/*
|
|
* Force the process to reload the VSX registers from
|
|
* current->thread when it next does VSX instruction.
|
|
*/
|
|
regs->msr &= ~MSR_VSX;
|
|
if (msr & MSR_VSX) {
|
|
/*
|
|
* Restore altivec registers from the stack to a local
|
|
* buffer, then write this out to the thread_struct
|
|
*/
|
|
if (copy_vsx_from_user(current, &sr->mc_vsregs))
|
|
return 1;
|
|
current->thread.used_vsr = true;
|
|
} else if (current->thread.used_vsr)
|
|
for (i = 0; i < 32 ; i++)
|
|
current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
|
|
#endif /* CONFIG_VSX */
|
|
/*
|
|
* force the process to reload the FP registers from
|
|
* current->thread when it next does FP instructions
|
|
*/
|
|
regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
|
|
|
|
#ifdef CONFIG_SPE
|
|
/* force the process to reload the spe registers from
|
|
current->thread when it next does spe instructions */
|
|
regs->msr &= ~MSR_SPE;
|
|
if (msr & MSR_SPE) {
|
|
/* restore spe registers from the stack */
|
|
if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
|
|
ELF_NEVRREG * sizeof(u32)))
|
|
return 1;
|
|
current->thread.used_spe = true;
|
|
} else if (current->thread.used_spe)
|
|
memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
|
|
|
|
/* Always get SPEFSCR back */
|
|
if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
|
|
return 1;
|
|
#endif /* CONFIG_SPE */
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
/*
|
|
* Restore the current user register values from the user stack, except for
|
|
* MSR, and recheckpoint the original checkpointed register state for processes
|
|
* in transactions.
|
|
*/
|
|
static long restore_tm_user_regs(struct pt_regs *regs,
|
|
struct mcontext __user *sr,
|
|
struct mcontext __user *tm_sr)
|
|
{
|
|
long err;
|
|
unsigned long msr, msr_hi;
|
|
#ifdef CONFIG_VSX
|
|
int i;
|
|
#endif
|
|
|
|
if (tm_suspend_disabled)
|
|
return 1;
|
|
/*
|
|
* restore general registers but not including MSR or SOFTE. Also
|
|
* take care of keeping r2 (TLS) intact if not a signal.
|
|
* See comment in signal_64.c:restore_tm_sigcontexts();
|
|
* TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
|
|
* were set by the signal delivery.
|
|
*/
|
|
err = restore_general_regs(regs, tm_sr);
|
|
err |= restore_general_regs(¤t->thread.ckpt_regs, sr);
|
|
|
|
err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
|
|
|
|
err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
|
|
if (err)
|
|
return 1;
|
|
|
|
/* Restore the previous little-endian mode */
|
|
regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
|
|
|
|
#ifdef CONFIG_ALTIVEC
|
|
regs->msr &= ~MSR_VEC;
|
|
if (msr & MSR_VEC) {
|
|
/* restore altivec registers from the stack */
|
|
if (__copy_from_user(¤t->thread.ckvr_state, &sr->mc_vregs,
|
|
sizeof(sr->mc_vregs)) ||
|
|
__copy_from_user(¤t->thread.vr_state,
|
|
&tm_sr->mc_vregs,
|
|
sizeof(sr->mc_vregs)))
|
|
return 1;
|
|
current->thread.used_vr = true;
|
|
} else if (current->thread.used_vr) {
|
|
memset(¤t->thread.vr_state, 0,
|
|
ELF_NVRREG * sizeof(vector128));
|
|
memset(¤t->thread.ckvr_state, 0,
|
|
ELF_NVRREG * sizeof(vector128));
|
|
}
|
|
|
|
/* Always get VRSAVE back */
|
|
if (__get_user(current->thread.ckvrsave,
|
|
(u32 __user *)&sr->mc_vregs[32]) ||
|
|
__get_user(current->thread.vrsave,
|
|
(u32 __user *)&tm_sr->mc_vregs[32]))
|
|
return 1;
|
|
if (cpu_has_feature(CPU_FTR_ALTIVEC))
|
|
mtspr(SPRN_VRSAVE, current->thread.ckvrsave);
|
|
#endif /* CONFIG_ALTIVEC */
|
|
|
|
regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
|
|
|
|
if (copy_fpr_from_user(current, &sr->mc_fregs) ||
|
|
copy_ckfpr_from_user(current, &tm_sr->mc_fregs))
|
|
return 1;
|
|
|
|
#ifdef CONFIG_VSX
|
|
regs->msr &= ~MSR_VSX;
|
|
if (msr & MSR_VSX) {
|
|
/*
|
|
* Restore altivec registers from the stack to a local
|
|
* buffer, then write this out to the thread_struct
|
|
*/
|
|
if (copy_vsx_from_user(current, &tm_sr->mc_vsregs) ||
|
|
copy_ckvsx_from_user(current, &sr->mc_vsregs))
|
|
return 1;
|
|
current->thread.used_vsr = true;
|
|
} else if (current->thread.used_vsr)
|
|
for (i = 0; i < 32 ; i++) {
|
|
current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
|
|
current->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = 0;
|
|
}
|
|
#endif /* CONFIG_VSX */
|
|
|
|
#ifdef CONFIG_SPE
|
|
/* SPE regs are not checkpointed with TM, so this section is
|
|
* simply the same as in restore_user_regs().
|
|
*/
|
|
regs->msr &= ~MSR_SPE;
|
|
if (msr & MSR_SPE) {
|
|
if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
|
|
ELF_NEVRREG * sizeof(u32)))
|
|
return 1;
|
|
current->thread.used_spe = true;
|
|
} else if (current->thread.used_spe)
|
|
memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
|
|
|
|
/* Always get SPEFSCR back */
|
|
if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
|
|
+ ELF_NEVRREG))
|
|
return 1;
|
|
#endif /* CONFIG_SPE */
|
|
|
|
/* Get the top half of the MSR from the user context */
|
|
if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
|
|
return 1;
|
|
msr_hi <<= 32;
|
|
/* If TM bits are set to the reserved value, it's an invalid context */
|
|
if (MSR_TM_RESV(msr_hi))
|
|
return 1;
|
|
|
|
/*
|
|
* Disabling preemption, since it is unsafe to be preempted
|
|
* with MSR[TS] set without recheckpointing.
|
|
*/
|
|
preempt_disable();
|
|
|
|
/*
|
|
* CAUTION:
|
|
* After regs->MSR[TS] being updated, make sure that get_user(),
|
|
* put_user() or similar functions are *not* called. These
|
|
* functions can generate page faults which will cause the process
|
|
* to be de-scheduled with MSR[TS] set but without calling
|
|
* tm_recheckpoint(). This can cause a bug.
|
|
*
|
|
* Pull in the MSR TM bits from the user context
|
|
*/
|
|
regs->msr = (regs->msr & ~MSR_TS_MASK) | (msr_hi & MSR_TS_MASK);
|
|
/* Now, recheckpoint. This loads up all of the checkpointed (older)
|
|
* registers, including FP and V[S]Rs. After recheckpointing, the
|
|
* transactional versions should be loaded.
|
|
*/
|
|
tm_enable();
|
|
/* Make sure the transaction is marked as failed */
|
|
current->thread.tm_texasr |= TEXASR_FS;
|
|
/* This loads the checkpointed FP/VEC state, if used */
|
|
tm_recheckpoint(¤t->thread);
|
|
|
|
/* This loads the speculative FP/VEC state, if used */
|
|
msr_check_and_set(msr & (MSR_FP | MSR_VEC));
|
|
if (msr & MSR_FP) {
|
|
load_fp_state(¤t->thread.fp_state);
|
|
regs->msr |= (MSR_FP | current->thread.fpexc_mode);
|
|
}
|
|
#ifdef CONFIG_ALTIVEC
|
|
if (msr & MSR_VEC) {
|
|
load_vr_state(¤t->thread.vr_state);
|
|
regs->msr |= MSR_VEC;
|
|
}
|
|
#endif
|
|
|
|
preempt_enable();
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC64
|
|
|
|
#define copy_siginfo_to_user copy_siginfo_to_user32
|
|
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
/*
|
|
* Set up a signal frame for a "real-time" signal handler
|
|
* (one which gets siginfo).
|
|
*/
|
|
int handle_rt_signal32(struct ksignal *ksig, sigset_t *oldset,
|
|
struct task_struct *tsk)
|
|
{
|
|
struct rt_sigframe __user *rt_sf;
|
|
struct mcontext __user *frame;
|
|
struct mcontext __user *tm_frame = NULL;
|
|
void __user *addr;
|
|
unsigned long newsp = 0;
|
|
int sigret;
|
|
unsigned long tramp;
|
|
struct pt_regs *regs = tsk->thread.regs;
|
|
|
|
BUG_ON(tsk != current);
|
|
|
|
/* Set up Signal Frame */
|
|
/* Put a Real Time Context onto stack */
|
|
rt_sf = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*rt_sf), 1);
|
|
addr = rt_sf;
|
|
if (unlikely(rt_sf == NULL))
|
|
goto badframe;
|
|
|
|
/* Put the siginfo & fill in most of the ucontext */
|
|
if (copy_siginfo_to_user(&rt_sf->info, &ksig->info)
|
|
|| __put_user(0, &rt_sf->uc.uc_flags)
|
|
|| __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
|
|
|| __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
|
|
&rt_sf->uc.uc_regs)
|
|
|| put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
|
|
goto badframe;
|
|
|
|
/* Save user registers on the stack */
|
|
frame = &rt_sf->uc.uc_mcontext;
|
|
addr = frame;
|
|
if (vdso32_rt_sigtramp && tsk->mm->context.vdso_base) {
|
|
sigret = 0;
|
|
tramp = tsk->mm->context.vdso_base + vdso32_rt_sigtramp;
|
|
} else {
|
|
sigret = __NR_rt_sigreturn;
|
|
tramp = (unsigned long) frame->tramp;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
tm_frame = &rt_sf->uc_transact.uc_mcontext;
|
|
if (MSR_TM_ACTIVE(regs->msr)) {
|
|
if (__put_user((unsigned long)&rt_sf->uc_transact,
|
|
&rt_sf->uc.uc_link) ||
|
|
__put_user((unsigned long)tm_frame,
|
|
&rt_sf->uc_transact.uc_regs))
|
|
goto badframe;
|
|
if (save_tm_user_regs(regs, frame, tm_frame, sigret))
|
|
goto badframe;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
if (__put_user(0, &rt_sf->uc.uc_link))
|
|
goto badframe;
|
|
if (save_user_regs(regs, frame, tm_frame, sigret, 1))
|
|
goto badframe;
|
|
}
|
|
regs->link = tramp;
|
|
|
|
tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
|
|
|
|
/* create a stack frame for the caller of the handler */
|
|
newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
|
|
addr = (void __user *)regs->gpr[1];
|
|
if (put_user(regs->gpr[1], (u32 __user *)newsp))
|
|
goto badframe;
|
|
|
|
/* Fill registers for signal handler */
|
|
regs->gpr[1] = newsp;
|
|
regs->gpr[3] = ksig->sig;
|
|
regs->gpr[4] = (unsigned long) &rt_sf->info;
|
|
regs->gpr[5] = (unsigned long) &rt_sf->uc;
|
|
regs->gpr[6] = (unsigned long) rt_sf;
|
|
regs->nip = (unsigned long) ksig->ka.sa.sa_handler;
|
|
/* enter the signal handler in native-endian mode */
|
|
regs->msr &= ~MSR_LE;
|
|
regs->msr |= (MSR_KERNEL & MSR_LE);
|
|
return 0;
|
|
|
|
badframe:
|
|
if (show_unhandled_signals)
|
|
printk_ratelimited(KERN_INFO
|
|
"%s[%d]: bad frame in handle_rt_signal32: "
|
|
"%p nip %08lx lr %08lx\n",
|
|
tsk->comm, tsk->pid,
|
|
addr, regs->nip, regs->link);
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
|
|
{
|
|
sigset_t set;
|
|
struct mcontext __user *mcp;
|
|
|
|
if (get_sigset_t(&set, &ucp->uc_sigmask))
|
|
return -EFAULT;
|
|
#ifdef CONFIG_PPC64
|
|
{
|
|
u32 cmcp;
|
|
|
|
if (__get_user(cmcp, &ucp->uc_regs))
|
|
return -EFAULT;
|
|
mcp = (struct mcontext __user *)(u64)cmcp;
|
|
/* no need to check access_ok(mcp), since mcp < 4GB */
|
|
}
|
|
#else
|
|
if (__get_user(mcp, &ucp->uc_regs))
|
|
return -EFAULT;
|
|
if (!access_ok(mcp, sizeof(*mcp)))
|
|
return -EFAULT;
|
|
#endif
|
|
set_current_blocked(&set);
|
|
if (restore_user_regs(regs, mcp, sig))
|
|
return -EFAULT;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
static int do_setcontext_tm(struct ucontext __user *ucp,
|
|
struct ucontext __user *tm_ucp,
|
|
struct pt_regs *regs)
|
|
{
|
|
sigset_t set;
|
|
struct mcontext __user *mcp;
|
|
struct mcontext __user *tm_mcp;
|
|
u32 cmcp;
|
|
u32 tm_cmcp;
|
|
|
|
if (get_sigset_t(&set, &ucp->uc_sigmask))
|
|
return -EFAULT;
|
|
|
|
if (__get_user(cmcp, &ucp->uc_regs) ||
|
|
__get_user(tm_cmcp, &tm_ucp->uc_regs))
|
|
return -EFAULT;
|
|
mcp = (struct mcontext __user *)(u64)cmcp;
|
|
tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
|
|
/* no need to check access_ok(mcp), since mcp < 4GB */
|
|
|
|
set_current_blocked(&set);
|
|
if (restore_tm_user_regs(regs, mcp, tm_mcp))
|
|
return -EFAULT;
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC64
|
|
COMPAT_SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
|
|
struct ucontext __user *, new_ctx, int, ctx_size)
|
|
#else
|
|
SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
|
|
struct ucontext __user *, new_ctx, long, ctx_size)
|
|
#endif
|
|
{
|
|
struct pt_regs *regs = current_pt_regs();
|
|
int ctx_has_vsx_region = 0;
|
|
|
|
#ifdef CONFIG_PPC64
|
|
unsigned long new_msr = 0;
|
|
|
|
if (new_ctx) {
|
|
struct mcontext __user *mcp;
|
|
u32 cmcp;
|
|
|
|
/*
|
|
* Get pointer to the real mcontext. No need for
|
|
* access_ok since we are dealing with compat
|
|
* pointers.
|
|
*/
|
|
if (__get_user(cmcp, &new_ctx->uc_regs))
|
|
return -EFAULT;
|
|
mcp = (struct mcontext __user *)(u64)cmcp;
|
|
if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
|
|
return -EFAULT;
|
|
}
|
|
/*
|
|
* Check that the context is not smaller than the original
|
|
* size (with VMX but without VSX)
|
|
*/
|
|
if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
|
|
return -EINVAL;
|
|
/*
|
|
* If the new context state sets the MSR VSX bits but
|
|
* it doesn't provide VSX state.
|
|
*/
|
|
if ((ctx_size < sizeof(struct ucontext)) &&
|
|
(new_msr & MSR_VSX))
|
|
return -EINVAL;
|
|
/* Does the context have enough room to store VSX data? */
|
|
if (ctx_size >= sizeof(struct ucontext))
|
|
ctx_has_vsx_region = 1;
|
|
#else
|
|
/* Context size is for future use. Right now, we only make sure
|
|
* we are passed something we understand
|
|
*/
|
|
if (ctx_size < sizeof(struct ucontext))
|
|
return -EINVAL;
|
|
#endif
|
|
if (old_ctx != NULL) {
|
|
struct mcontext __user *mctx;
|
|
|
|
/*
|
|
* old_ctx might not be 16-byte aligned, in which
|
|
* case old_ctx->uc_mcontext won't be either.
|
|
* Because we have the old_ctx->uc_pad2 field
|
|
* before old_ctx->uc_mcontext, we need to round down
|
|
* from &old_ctx->uc_mcontext to a 16-byte boundary.
|
|
*/
|
|
mctx = (struct mcontext __user *)
|
|
((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
|
|
if (!access_ok(old_ctx, ctx_size)
|
|
|| save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
|
|
|| put_sigset_t(&old_ctx->uc_sigmask, ¤t->blocked)
|
|
|| __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
|
|
return -EFAULT;
|
|
}
|
|
if (new_ctx == NULL)
|
|
return 0;
|
|
if (!access_ok(new_ctx, ctx_size) ||
|
|
fault_in_pages_readable((u8 __user *)new_ctx, ctx_size))
|
|
return -EFAULT;
|
|
|
|
/*
|
|
* If we get a fault copying the context into the kernel's
|
|
* image of the user's registers, we can't just return -EFAULT
|
|
* because the user's registers will be corrupted. For instance
|
|
* the NIP value may have been updated but not some of the
|
|
* other registers. Given that we have done the access_ok
|
|
* and successfully read the first and last bytes of the region
|
|
* above, this should only happen in an out-of-memory situation
|
|
* or if another thread unmaps the region containing the context.
|
|
* We kill the task with a SIGSEGV in this situation.
|
|
*/
|
|
if (do_setcontext(new_ctx, regs, 0))
|
|
do_exit(SIGSEGV);
|
|
|
|
set_thread_flag(TIF_RESTOREALL);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC64
|
|
COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
|
|
#else
|
|
SYSCALL_DEFINE0(rt_sigreturn)
|
|
#endif
|
|
{
|
|
struct rt_sigframe __user *rt_sf;
|
|
struct pt_regs *regs = current_pt_regs();
|
|
int tm_restore = 0;
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
struct ucontext __user *uc_transact;
|
|
unsigned long msr_hi;
|
|
unsigned long tmp;
|
|
#endif
|
|
/* Always make any pending restarted system calls return -EINTR */
|
|
current->restart_block.fn = do_no_restart_syscall;
|
|
|
|
rt_sf = (struct rt_sigframe __user *)
|
|
(regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
|
|
if (!access_ok(rt_sf, sizeof(*rt_sf)))
|
|
goto bad;
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
/*
|
|
* If there is a transactional state then throw it away.
|
|
* The purpose of a sigreturn is to destroy all traces of the
|
|
* signal frame, this includes any transactional state created
|
|
* within in. We only check for suspended as we can never be
|
|
* active in the kernel, we are active, there is nothing better to
|
|
* do than go ahead and Bad Thing later.
|
|
* The cause is not important as there will never be a
|
|
* recheckpoint so it's not user visible.
|
|
*/
|
|
if (MSR_TM_SUSPENDED(mfmsr()))
|
|
tm_reclaim_current(0);
|
|
|
|
if (__get_user(tmp, &rt_sf->uc.uc_link))
|
|
goto bad;
|
|
uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
|
|
if (uc_transact) {
|
|
u32 cmcp;
|
|
struct mcontext __user *mcp;
|
|
|
|
if (__get_user(cmcp, &uc_transact->uc_regs))
|
|
return -EFAULT;
|
|
mcp = (struct mcontext __user *)(u64)cmcp;
|
|
/* The top 32 bits of the MSR are stashed in the transactional
|
|
* ucontext. */
|
|
if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
|
|
goto bad;
|
|
|
|
if (MSR_TM_ACTIVE(msr_hi<<32)) {
|
|
/* Trying to start TM on non TM system */
|
|
if (!cpu_has_feature(CPU_FTR_TM))
|
|
goto bad;
|
|
/* We only recheckpoint on return if we're
|
|
* transaction.
|
|
*/
|
|
tm_restore = 1;
|
|
if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
|
|
goto bad;
|
|
}
|
|
}
|
|
if (!tm_restore) {
|
|
/*
|
|
* Unset regs->msr because ucontext MSR TS is not
|
|
* set, and recheckpoint was not called. This avoid
|
|
* hitting a TM Bad thing at RFID
|
|
*/
|
|
regs->msr &= ~MSR_TS_MASK;
|
|
}
|
|
/* Fall through, for non-TM restore */
|
|
#endif
|
|
if (!tm_restore)
|
|
if (do_setcontext(&rt_sf->uc, regs, 1))
|
|
goto bad;
|
|
|
|
/*
|
|
* It's not clear whether or why it is desirable to save the
|
|
* sigaltstack setting on signal delivery and restore it on
|
|
* signal return. But other architectures do this and we have
|
|
* always done it up until now so it is probably better not to
|
|
* change it. -- paulus
|
|
*/
|
|
#ifdef CONFIG_PPC64
|
|
if (compat_restore_altstack(&rt_sf->uc.uc_stack))
|
|
goto bad;
|
|
#else
|
|
if (restore_altstack(&rt_sf->uc.uc_stack))
|
|
goto bad;
|
|
#endif
|
|
set_thread_flag(TIF_RESTOREALL);
|
|
return 0;
|
|
|
|
bad:
|
|
if (show_unhandled_signals)
|
|
printk_ratelimited(KERN_INFO
|
|
"%s[%d]: bad frame in sys_rt_sigreturn: "
|
|
"%p nip %08lx lr %08lx\n",
|
|
current->comm, current->pid,
|
|
rt_sf, regs->nip, regs->link);
|
|
|
|
force_sig(SIGSEGV);
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC32
|
|
SYSCALL_DEFINE3(debug_setcontext, struct ucontext __user *, ctx,
|
|
int, ndbg, struct sig_dbg_op __user *, dbg)
|
|
{
|
|
struct pt_regs *regs = current_pt_regs();
|
|
struct sig_dbg_op op;
|
|
int i;
|
|
unsigned long new_msr = regs->msr;
|
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
|
unsigned long new_dbcr0 = current->thread.debug.dbcr0;
|
|
#endif
|
|
|
|
for (i=0; i<ndbg; i++) {
|
|
if (copy_from_user(&op, dbg + i, sizeof(op)))
|
|
return -EFAULT;
|
|
switch (op.dbg_type) {
|
|
case SIG_DBG_SINGLE_STEPPING:
|
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
|
if (op.dbg_value) {
|
|
new_msr |= MSR_DE;
|
|
new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
|
|
} else {
|
|
new_dbcr0 &= ~DBCR0_IC;
|
|
if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
|
|
current->thread.debug.dbcr1)) {
|
|
new_msr &= ~MSR_DE;
|
|
new_dbcr0 &= ~DBCR0_IDM;
|
|
}
|
|
}
|
|
#else
|
|
if (op.dbg_value)
|
|
new_msr |= MSR_SE;
|
|
else
|
|
new_msr &= ~MSR_SE;
|
|
#endif
|
|
break;
|
|
case SIG_DBG_BRANCH_TRACING:
|
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
|
return -EINVAL;
|
|
#else
|
|
if (op.dbg_value)
|
|
new_msr |= MSR_BE;
|
|
else
|
|
new_msr &= ~MSR_BE;
|
|
#endif
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
/* We wait until here to actually install the values in the
|
|
registers so if we fail in the above loop, it will not
|
|
affect the contents of these registers. After this point,
|
|
failure is a problem, anyway, and it's very unlikely unless
|
|
the user is really doing something wrong. */
|
|
regs->msr = new_msr;
|
|
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
|
|
current->thread.debug.dbcr0 = new_dbcr0;
|
|
#endif
|
|
|
|
if (!access_ok(ctx, sizeof(*ctx)) ||
|
|
fault_in_pages_readable((u8 __user *)ctx, sizeof(*ctx)))
|
|
return -EFAULT;
|
|
|
|
/*
|
|
* If we get a fault copying the context into the kernel's
|
|
* image of the user's registers, we can't just return -EFAULT
|
|
* because the user's registers will be corrupted. For instance
|
|
* the NIP value may have been updated but not some of the
|
|
* other registers. Given that we have done the access_ok
|
|
* and successfully read the first and last bytes of the region
|
|
* above, this should only happen in an out-of-memory situation
|
|
* or if another thread unmaps the region containing the context.
|
|
* We kill the task with a SIGSEGV in this situation.
|
|
*/
|
|
if (do_setcontext(ctx, regs, 1)) {
|
|
if (show_unhandled_signals)
|
|
printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
|
|
"sys_debug_setcontext: %p nip %08lx "
|
|
"lr %08lx\n",
|
|
current->comm, current->pid,
|
|
ctx, regs->nip, regs->link);
|
|
|
|
force_sig(SIGSEGV);
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* It's not clear whether or why it is desirable to save the
|
|
* sigaltstack setting on signal delivery and restore it on
|
|
* signal return. But other architectures do this and we have
|
|
* always done it up until now so it is probably better not to
|
|
* change it. -- paulus
|
|
*/
|
|
restore_altstack(&ctx->uc_stack);
|
|
|
|
set_thread_flag(TIF_RESTOREALL);
|
|
out:
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* OK, we're invoking a handler
|
|
*/
|
|
int handle_signal32(struct ksignal *ksig, sigset_t *oldset,
|
|
struct task_struct *tsk)
|
|
{
|
|
struct sigcontext __user *sc;
|
|
struct sigframe __user *frame;
|
|
struct mcontext __user *tm_mctx = NULL;
|
|
unsigned long newsp = 0;
|
|
int sigret;
|
|
unsigned long tramp;
|
|
struct pt_regs *regs = tsk->thread.regs;
|
|
|
|
BUG_ON(tsk != current);
|
|
|
|
/* Set up Signal Frame */
|
|
frame = get_sigframe(ksig, get_tm_stackpointer(tsk), sizeof(*frame), 1);
|
|
if (unlikely(frame == NULL))
|
|
goto badframe;
|
|
sc = (struct sigcontext __user *) &frame->sctx;
|
|
|
|
#if _NSIG != 64
|
|
#error "Please adjust handle_signal()"
|
|
#endif
|
|
if (__put_user(to_user_ptr(ksig->ka.sa.sa_handler), &sc->handler)
|
|
|| __put_user(oldset->sig[0], &sc->oldmask)
|
|
#ifdef CONFIG_PPC64
|
|
|| __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
|
|
#else
|
|
|| __put_user(oldset->sig[1], &sc->_unused[3])
|
|
#endif
|
|
|| __put_user(to_user_ptr(&frame->mctx), &sc->regs)
|
|
|| __put_user(ksig->sig, &sc->signal))
|
|
goto badframe;
|
|
|
|
if (vdso32_sigtramp && tsk->mm->context.vdso_base) {
|
|
sigret = 0;
|
|
tramp = tsk->mm->context.vdso_base + vdso32_sigtramp;
|
|
} else {
|
|
sigret = __NR_sigreturn;
|
|
tramp = (unsigned long) frame->mctx.tramp;
|
|
}
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
tm_mctx = &frame->mctx_transact;
|
|
if (MSR_TM_ACTIVE(regs->msr)) {
|
|
if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
|
|
sigret))
|
|
goto badframe;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
|
|
goto badframe;
|
|
}
|
|
|
|
regs->link = tramp;
|
|
|
|
tsk->thread.fp_state.fpscr = 0; /* turn off all fp exceptions */
|
|
|
|
/* create a stack frame for the caller of the handler */
|
|
newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
|
|
if (put_user(regs->gpr[1], (u32 __user *)newsp))
|
|
goto badframe;
|
|
|
|
regs->gpr[1] = newsp;
|
|
regs->gpr[3] = ksig->sig;
|
|
regs->gpr[4] = (unsigned long) sc;
|
|
regs->nip = (unsigned long) (unsigned long)ksig->ka.sa.sa_handler;
|
|
/* enter the signal handler in big-endian mode */
|
|
regs->msr &= ~MSR_LE;
|
|
return 0;
|
|
|
|
badframe:
|
|
if (show_unhandled_signals)
|
|
printk_ratelimited(KERN_INFO
|
|
"%s[%d]: bad frame in handle_signal32: "
|
|
"%p nip %08lx lr %08lx\n",
|
|
tsk->comm, tsk->pid,
|
|
frame, regs->nip, regs->link);
|
|
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* Do a signal return; undo the signal stack.
|
|
*/
|
|
#ifdef CONFIG_PPC64
|
|
COMPAT_SYSCALL_DEFINE0(sigreturn)
|
|
#else
|
|
SYSCALL_DEFINE0(sigreturn)
|
|
#endif
|
|
{
|
|
struct pt_regs *regs = current_pt_regs();
|
|
struct sigframe __user *sf;
|
|
struct sigcontext __user *sc;
|
|
struct sigcontext sigctx;
|
|
struct mcontext __user *sr;
|
|
void __user *addr;
|
|
sigset_t set;
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
struct mcontext __user *mcp, *tm_mcp;
|
|
unsigned long msr_hi;
|
|
#endif
|
|
|
|
/* Always make any pending restarted system calls return -EINTR */
|
|
current->restart_block.fn = do_no_restart_syscall;
|
|
|
|
sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
|
|
sc = &sf->sctx;
|
|
addr = sc;
|
|
if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
|
|
goto badframe;
|
|
|
|
#ifdef CONFIG_PPC64
|
|
/*
|
|
* Note that PPC32 puts the upper 32 bits of the sigmask in the
|
|
* unused part of the signal stackframe
|
|
*/
|
|
set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
|
|
#else
|
|
set.sig[0] = sigctx.oldmask;
|
|
set.sig[1] = sigctx._unused[3];
|
|
#endif
|
|
set_current_blocked(&set);
|
|
|
|
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
|
|
mcp = (struct mcontext __user *)&sf->mctx;
|
|
tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
|
|
if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
|
|
goto badframe;
|
|
if (MSR_TM_ACTIVE(msr_hi<<32)) {
|
|
if (!cpu_has_feature(CPU_FTR_TM))
|
|
goto badframe;
|
|
if (restore_tm_user_regs(regs, mcp, tm_mcp))
|
|
goto badframe;
|
|
} else
|
|
#endif
|
|
{
|
|
sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
|
|
addr = sr;
|
|
if (!access_ok(sr, sizeof(*sr))
|
|
|| restore_user_regs(regs, sr, 1))
|
|
goto badframe;
|
|
}
|
|
|
|
set_thread_flag(TIF_RESTOREALL);
|
|
return 0;
|
|
|
|
badframe:
|
|
if (show_unhandled_signals)
|
|
printk_ratelimited(KERN_INFO
|
|
"%s[%d]: bad frame in sys_sigreturn: "
|
|
"%p nip %08lx lr %08lx\n",
|
|
current->comm, current->pid,
|
|
addr, regs->nip, regs->link);
|
|
|
|
force_sig(SIGSEGV);
|
|
return 0;
|
|
}
|